remote_gdb.cc (10601:6efb37480d87) | remote_gdb.cc (11274:d9a0136ab8cc) |
---|---|
1/* | 1/* |
2 * Copyright 2015 LabWare |
|
2 * Copyright 2014 Google, Inc. 3 * Copyright (c) 2010 ARM Limited 4 * All rights reserved 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating 9 * to a hardware implementation of the functionality of the software --- 26 unchanged lines hidden (view full) --- 36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 40 * 41 * Authors: Nathan Binkert 42 * William Wang 43 * Deyuan Guo | 3 * Copyright 2014 Google, Inc. 4 * Copyright (c) 2010 ARM Limited 5 * All rights reserved 6 * 7 * The license below extends only to copyright in the software and shall 8 * not be construed as granting a license to any other intellectual 9 * property including but not limited to intellectual property relating 10 * to a hardware implementation of the functionality of the software --- 26 unchanged lines hidden (view full) --- 37 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 38 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 40 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 41 * 42 * Authors: Nathan Binkert 43 * William Wang 44 * Deyuan Guo |
45 * Boris Shingarov |
|
44 */ 45 46/* 47 * Copyright (c) 1990, 1993 The Regents of the University of California 48 * All rights reserved 49 * 50 * This software was developed by the Computer Systems Engineering group 51 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and --- 92 unchanged lines hidden (view full) --- 144#include "debug/GDBMisc.hh" 145#include "mem/page_table.hh" 146#include "sim/full_system.hh" 147 148using namespace std; 149using namespace MipsISA; 150 151RemoteGDB::RemoteGDB(System *_system, ThreadContext *tc) | 46 */ 47 48/* 49 * Copyright (c) 1990, 1993 The Regents of the University of California 50 * All rights reserved 51 * 52 * This software was developed by the Computer Systems Engineering group 53 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and --- 92 unchanged lines hidden (view full) --- 146#include "debug/GDBMisc.hh" 147#include "mem/page_table.hh" 148#include "sim/full_system.hh" 149 150using namespace std; 151using namespace MipsISA; 152 153RemoteGDB::RemoteGDB(System *_system, ThreadContext *tc) |
152 : BaseRemoteGDB(_system, tc, GdbNumRegs * sizeof(uint32_t)) | 154 : BaseRemoteGDB(_system, tc) |
153{ 154} 155 156/* 157 * Determine if the mapping at va..(va+len) is valid. 158 */ 159bool 160RemoteGDB::acc(Addr va, size_t len) 161{ 162 TlbEntry entry; 163 //Check to make sure the first byte is mapped into the processes address 164 //space. 165 if (FullSystem) 166 panic("acc not implemented for MIPS FS!"); 167 else 168 return context->getProcessPtr()->pTable->lookup(va, entry); 169} 170 | 155{ 156} 157 158/* 159 * Determine if the mapping at va..(va+len) is valid. 160 */ 161bool 162RemoteGDB::acc(Addr va, size_t len) 163{ 164 TlbEntry entry; 165 //Check to make sure the first byte is mapped into the processes address 166 //space. 167 if (FullSystem) 168 panic("acc not implemented for MIPS FS!"); 169 else 170 return context->getProcessPtr()->pTable->lookup(va, entry); 171} 172 |
171/* 172 * Translate the kernel debugger register format into the GDB register 173 * format. 174 */ | |
175void | 173void |
176RemoteGDB::getregs() | 174RemoteGDB::MipsGdbRegCache::getRegs(ThreadContext *context) |
177{ 178 DPRINTF(GDBAcc, "getregs in remotegdb \n"); | 175{ 176 DPRINTF(GDBAcc, "getregs in remotegdb \n"); |
179 memset(gdbregs.regs, 0, gdbregs.bytes()); | |
180 | 177 |
181 // MIPS registers are 32 bits wide, gdb registers are 64 bits wide 182 // two MIPS registers are packed into one gdb register (little endian) 183 184 // INTREG: R0~R31 185 for (int i = 0; i < GdbIntArchRegs; i++) 186 gdbregs.regs32[i] = context->readIntReg(i); 187 // SR, LO, HI, BADVADDR, CAUSE, PC 188 gdbregs.regs32[GdbIntArchRegs + 0] = 189 context->readMiscRegNoEffect(MISCREG_STATUS); 190 gdbregs.regs32[GdbIntArchRegs + 1] = context->readIntReg(INTREG_LO); 191 gdbregs.regs32[GdbIntArchRegs + 2] = context->readIntReg(INTREG_HI); 192 gdbregs.regs32[GdbIntArchRegs + 3] = 193 context->readMiscRegNoEffect(MISCREG_BADVADDR); 194 gdbregs.regs32[GdbIntArchRegs + 4] = 195 context->readMiscRegNoEffect(MISCREG_CAUSE); 196 gdbregs.regs32[GdbIntArchRegs + 5] = context->pcState().pc(); 197 // FLOATREG: F0~F31 198 for (int i = 0; i < GdbFloatArchRegs; i++) 199 gdbregs.regs32[GdbIntRegs + i] = context->readFloatRegBits(i); 200 // FCR, FIR 201 gdbregs.regs32[GdbIntRegs + GdbFloatArchRegs + 0] = 202 context->readFloatRegBits(FLOATREG_FCCR); 203 gdbregs.regs32[GdbIntRegs + GdbFloatArchRegs + 1] = 204 context->readFloatRegBits(FLOATREG_FIR); | 178 for (int i = 0; i < 32; i++) r.gpr[i] = context->readIntReg(i); 179 r.sr = context->readMiscRegNoEffect(MISCREG_STATUS); 180 r.lo = context->readIntReg(INTREG_LO); 181 r.hi = context->readIntReg(INTREG_HI); 182 r.badvaddr = context->readMiscRegNoEffect(MISCREG_BADVADDR); 183 r.cause = context->readMiscRegNoEffect(MISCREG_CAUSE); 184 r.pc = context->pcState().pc(); 185 for (int i = 0; i < 32; i++) r.fpr[i] = context->readFloatRegBits(i); 186 r.fsr = context->readFloatRegBits(FLOATREG_FCCR); 187 r.fir = context->readFloatRegBits(FLOATREG_FIR); |
205} 206 | 188} 189 |
207/* 208 * Translate the GDB register format into the kernel debugger register 209 * format. 210 */ | |
211void | 190void |
212RemoteGDB::setregs() | 191RemoteGDB::MipsGdbRegCache::setRegs(ThreadContext *context) const |
213{ 214 DPRINTF(GDBAcc, "setregs in remotegdb \n"); 215 | 192{ 193 DPRINTF(GDBAcc, "setregs in remotegdb \n"); 194 |
216 // INTREG: R0~R31 217 for (int i = 1; i < GdbIntArchRegs; i++) 218 context->setIntReg(i, gdbregs.regs32[i]); 219 // SR, LO, HI, BADVADDR, CAUSE, PC 220 context->setMiscRegNoEffect(MISCREG_STATUS, 221 gdbregs.regs32[GdbIntArchRegs + 0]); 222 context->setIntReg(INTREG_LO, gdbregs.regs32[GdbIntArchRegs + 1]); 223 context->setIntReg(INTREG_HI, gdbregs.regs32[GdbIntArchRegs + 2]); 224 context->setMiscRegNoEffect(MISCREG_BADVADDR, 225 gdbregs.regs32[GdbIntArchRegs + 3]); 226 context->setMiscRegNoEffect(MISCREG_CAUSE, 227 gdbregs.regs32[GdbIntArchRegs + 4]); 228 context->pcState(gdbregs.regs32[GdbIntArchRegs + 5]); 229 // FLOATREG: F0~F31 230 for (int i = 0; i < GdbFloatArchRegs; i++) 231 context->setFloatRegBits(i, gdbregs.regs32[GdbIntRegs + i]); 232 // FCR, FIR 233 context->setFloatRegBits(FLOATREG_FCCR, 234 gdbregs.regs32[GdbIntRegs + GdbFloatArchRegs + 0]); 235 context->setFloatRegBits(FLOATREG_FIR, 236 gdbregs.regs32[GdbIntRegs + GdbFloatArchRegs + 1]); | 195 for (int i = 1; i < 32; i++) context->setIntReg(i, r.gpr[i]); 196 context->setMiscRegNoEffect(MISCREG_STATUS, r.sr); 197 context->setIntReg(INTREG_LO, r.lo); 198 context->setIntReg(INTREG_HI, r.hi); 199 context->setMiscRegNoEffect(MISCREG_BADVADDR, r.badvaddr); 200 context->setMiscRegNoEffect(MISCREG_CAUSE, r.cause); 201 context->pcState(r.pc); 202 for (int i = 0; i < 32; i++) context->setFloatRegBits(i, r.fpr[i]); 203 context->setFloatRegBits(FLOATREG_FCCR, r.fsr); 204 context->setFloatRegBits(FLOATREG_FIR, r.fir); |
237} | 205} |
206 207RemoteGDB::BaseGdbRegCache* 208RemoteGDB::gdbRegs() { 209 return new MipsGdbRegCache(this); 210} |
|