registers.hh (12109:f29e9c5418aa) | registers.hh (12334:e0ab29a34764) |
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1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 20 unchanged lines hidden (view full) --- 29 * Authors: Korey Sewell 30 */ 31 32#ifndef __ARCH_MIPS_REGISTERS_HH__ 33#define __ARCH_MIPS_REGISTERS_HH__ 34 35#include "arch/generic/vec_reg.hh" 36#include "arch/mips/generated/max_inst_regs.hh" | 1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 20 unchanged lines hidden (view full) --- 29 * Authors: Korey Sewell 30 */ 31 32#ifndef __ARCH_MIPS_REGISTERS_HH__ 33#define __ARCH_MIPS_REGISTERS_HH__ 34 35#include "arch/generic/vec_reg.hh" 36#include "arch/mips/generated/max_inst_regs.hh" |
37#include "base/misc.hh" | 37#include "base/logging.hh" |
38#include "base/types.hh" 39 40class ThreadContext; 41 42namespace MipsISA 43{ 44 45using MipsISAInst::MaxInstSrcRegs; --- 265 unchanged lines hidden --- | 38#include "base/types.hh" 39 40class ThreadContext; 41 42namespace MipsISA 43{ 44 45using MipsISAInst::MaxInstSrcRegs; --- 265 unchanged lines hidden --- |