registers.hh (12104:edd63f9c6184) | registers.hh (12109:f29e9c5418aa) |
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1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 18 unchanged lines hidden (view full) --- 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Authors: Korey Sewell 30 */ 31 32#ifndef __ARCH_MIPS_REGISTERS_HH__ 33#define __ARCH_MIPS_REGISTERS_HH__ 34 | 1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 18 unchanged lines hidden (view full) --- 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Authors: Korey Sewell 30 */ 31 32#ifndef __ARCH_MIPS_REGISTERS_HH__ 33#define __ARCH_MIPS_REGISTERS_HH__ 34 |
35#include "arch/generic/vec_reg.hh" |
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35#include "arch/mips/generated/max_inst_regs.hh" 36#include "base/misc.hh" 37#include "base/types.hh" 38 39class ThreadContext; 40 41namespace MipsISA 42{ --- 241 unchanged lines hidden (view full) --- 284typedef float FloatReg; 285 286// cop-0/cop-1 system control register 287typedef uint64_t MiscReg; 288 289// dummy typedef since we don't have CC regs 290typedef uint8_t CCReg; 291 | 36#include "arch/mips/generated/max_inst_regs.hh" 37#include "base/misc.hh" 38#include "base/types.hh" 39 40class ThreadContext; 41 42namespace MipsISA 43{ --- 241 unchanged lines hidden (view full) --- 285typedef float FloatReg; 286 287// cop-0/cop-1 system control register 288typedef uint64_t MiscReg; 289 290// dummy typedef since we don't have CC regs 291typedef uint8_t CCReg; 292 |
293// dummy typedefs since we don't have vector regs 294constexpr unsigned NumVecElemPerVecReg = 2; 295using VecElem = uint32_t; 296using VecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, false>; 297using ConstVecReg = ::VecRegT<VecElem, NumVecElemPerVecReg, true>; 298using VecRegContainer = VecReg::Container; 299// This has to be one to prevent warnings that are treated as errors 300constexpr unsigned NumVecRegs = 1; 301 |
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292typedef union { 293 IntReg intreg; 294 FloatReg fpreg; 295 MiscReg ctrlreg; 296} AnyReg; 297 298} // namespace MipsISA 299 300#endif | 302typedef union { 303 IntReg intreg; 304 FloatReg fpreg; 305 MiscReg ctrlreg; 306} AnyReg; 307 308} // namespace MipsISA 309 310#endif |