1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 * Ali Saidi 30 * Korey Sewell 31 */ 32 33#include "arch/mips/process.hh" 34 35#include "arch/mips/isa_traits.hh" 36#include "base/loader/elf_object.hh" 37#include "base/loader/object_file.hh" 38#include "base/misc.hh" 39#include "cpu/thread_context.hh" 40#include "debug/Loader.hh" 41#include "mem/page_table.hh" 42#include "sim/aux_vector.hh" 43#include "sim/process.hh" 44#include "sim/process_impl.hh" 45#include "sim/syscall_return.hh" 46#include "sim/system.hh" 47 48using namespace std; 49using namespace MipsISA; 50 51MipsProcess::MipsProcess(ProcessParams * params, ObjectFile *objFile) 52 : Process(params, objFile) 53{ 54 // Set up stack. On MIPS, stack starts at the top of kuseg 55 // user address space. MIPS stack grows down from here
| 1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 * Ali Saidi 30 * Korey Sewell 31 */ 32 33#include "arch/mips/process.hh" 34 35#include "arch/mips/isa_traits.hh" 36#include "base/loader/elf_object.hh" 37#include "base/loader/object_file.hh" 38#include "base/misc.hh" 39#include "cpu/thread_context.hh" 40#include "debug/Loader.hh" 41#include "mem/page_table.hh" 42#include "sim/aux_vector.hh" 43#include "sim/process.hh" 44#include "sim/process_impl.hh" 45#include "sim/syscall_return.hh" 46#include "sim/system.hh" 47 48using namespace std; 49using namespace MipsISA; 50 51MipsProcess::MipsProcess(ProcessParams * params, ObjectFile *objFile) 52 : Process(params, objFile) 53{ 54 // Set up stack. On MIPS, stack starts at the top of kuseg 55 // user address space. MIPS stack grows down from here
|
56 stack_base = 0x7FFFFFFF;
| 56 memState->stackBase = 0x7FFFFFFF;
|
57 58 // Set pointer for next thread stack. Reserve 8M for main stack.
| 57 58 // Set pointer for next thread stack. Reserve 8M for main stack.
|
59 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
| 59 memState->nextThreadStackBase = memState->stackBase - (8 * 1024 * 1024);
|
60 61 // Set up break point (Top of Heap)
| 60 61 // Set up break point (Top of Heap)
|
62 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 63 brk_point = roundUp(brk_point, PageBytes);
| 62 memState->brkPoint = objFile->dataBase() + objFile->dataSize() + 63 objFile->bssSize(); 64 memState->brkPoint = roundUp(memState->brkPoint, PageBytes);
|
64 65 // Set up region for mmaps. Start it 1GB above the top of the heap.
| 65 66 // Set up region for mmaps. Start it 1GB above the top of the heap.
|
66 mmap_end = brk_point + 0x40000000L;
| 67 memState->mmapEnd = memState->brkPoint + 0x40000000L;
|
67} 68 69void 70MipsProcess::initState() 71{ 72 Process::initState(); 73 74 argsInit<uint32_t>(PageBytes); 75} 76 77template<class IntType> 78void 79MipsProcess::argsInit(int pageSize) 80{ 81 int intSize = sizeof(IntType); 82 83 // Patch the ld_bias for dynamic executables. 84 updateBias(); 85 86 // load object file into target memory 87 objFile->loadSections(initVirtMem); 88 89 typedef AuxVector<IntType> auxv_t; 90 std::vector<auxv_t> auxv; 91 92 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 93 if (elfObject) 94 { 95 // Set the system page size 96 auxv.push_back(auxv_t(M5_AT_PAGESZ, MipsISA::PageBytes)); 97 // Set the frequency at which time() increments 98 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 99 // For statically linked executables, this is the virtual 100 // address of the program header tables if they appear in the 101 // executable image. 102 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 103 DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable()); 104 // This is the size of a program header entry from the elf file. 105 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 106 // This is the number of program headers from the original elf file. 107 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 108 // This is the base address of the ELF interpreter; it should be 109 // zero for static executables or contain the base address for 110 // dynamic executables. 111 auxv.push_back(auxv_t(M5_AT_BASE, getBias())); 112 //The entry point to the program 113 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 114 //Different user and group IDs 115 auxv.push_back(auxv_t(M5_AT_UID, uid())); 116 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 117 auxv.push_back(auxv_t(M5_AT_GID, gid())); 118 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 119 } 120 121 // Calculate how much space we need for arg & env & auxv arrays. 122 int argv_array_size = intSize * (argv.size() + 1); 123 int envp_array_size = intSize * (envp.size() + 1); 124 int auxv_array_size = intSize * 2 * (auxv.size() + 1); 125 126 int arg_data_size = 0; 127 for (vector<string>::size_type i = 0; i < argv.size(); ++i) { 128 arg_data_size += argv[i].size() + 1; 129 } 130 int env_data_size = 0; 131 for (vector<string>::size_type i = 0; i < envp.size(); ++i) { 132 env_data_size += envp[i].size() + 1; 133 } 134 135 int space_needed = 136 argv_array_size + 137 envp_array_size + 138 auxv_array_size + 139 arg_data_size + 140 env_data_size; 141 142 // set bottom of stack
| 68} 69 70void 71MipsProcess::initState() 72{ 73 Process::initState(); 74 75 argsInit<uint32_t>(PageBytes); 76} 77 78template<class IntType> 79void 80MipsProcess::argsInit(int pageSize) 81{ 82 int intSize = sizeof(IntType); 83 84 // Patch the ld_bias for dynamic executables. 85 updateBias(); 86 87 // load object file into target memory 88 objFile->loadSections(initVirtMem); 89 90 typedef AuxVector<IntType> auxv_t; 91 std::vector<auxv_t> auxv; 92 93 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 94 if (elfObject) 95 { 96 // Set the system page size 97 auxv.push_back(auxv_t(M5_AT_PAGESZ, MipsISA::PageBytes)); 98 // Set the frequency at which time() increments 99 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 100 // For statically linked executables, this is the virtual 101 // address of the program header tables if they appear in the 102 // executable image. 103 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 104 DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable()); 105 // This is the size of a program header entry from the elf file. 106 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 107 // This is the number of program headers from the original elf file. 108 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 109 // This is the base address of the ELF interpreter; it should be 110 // zero for static executables or contain the base address for 111 // dynamic executables. 112 auxv.push_back(auxv_t(M5_AT_BASE, getBias())); 113 //The entry point to the program 114 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 115 //Different user and group IDs 116 auxv.push_back(auxv_t(M5_AT_UID, uid())); 117 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 118 auxv.push_back(auxv_t(M5_AT_GID, gid())); 119 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 120 } 121 122 // Calculate how much space we need for arg & env & auxv arrays. 123 int argv_array_size = intSize * (argv.size() + 1); 124 int envp_array_size = intSize * (envp.size() + 1); 125 int auxv_array_size = intSize * 2 * (auxv.size() + 1); 126 127 int arg_data_size = 0; 128 for (vector<string>::size_type i = 0; i < argv.size(); ++i) { 129 arg_data_size += argv[i].size() + 1; 130 } 131 int env_data_size = 0; 132 for (vector<string>::size_type i = 0; i < envp.size(); ++i) { 133 env_data_size += envp[i].size() + 1; 134 } 135 136 int space_needed = 137 argv_array_size + 138 envp_array_size + 139 auxv_array_size + 140 arg_data_size + 141 env_data_size; 142 143 // set bottom of stack
|
143 stack_min = stack_base - space_needed;
| 144 memState->stackMin = memState->stackBase - space_needed;
|
144 // align it
| 145 // align it
|
145 stack_min = roundDown(stack_min, pageSize); 146 stack_size = stack_base - stack_min;
| 146 memState->stackMin = roundDown(memState->stackMin, pageSize); 147 memState->stackSize = memState->stackBase - memState->stackMin;
|
147 // map memory
| 148 // map memory
|
148 allocateMem(stack_min, roundUp(stack_size, pageSize));
| 149 allocateMem(memState->stackMin, roundUp(memState->stackSize, pageSize));
|
149 150 // map out initial stack contents
| 150 151 // map out initial stack contents
|
151 IntType argv_array_base = stack_min + intSize; // room for argc
| 152 IntType argv_array_base = memState->stackMin + intSize; // room for argc
|
152 IntType envp_array_base = argv_array_base + argv_array_size; 153 IntType auxv_array_base = envp_array_base + envp_array_size; 154 IntType arg_data_base = auxv_array_base + auxv_array_size; 155 IntType env_data_base = arg_data_base + arg_data_size; 156 157 // write contents to stack 158 IntType argc = argv.size(); 159 160 argc = htog((IntType)argc); 161
| 153 IntType envp_array_base = argv_array_base + argv_array_size; 154 IntType auxv_array_base = envp_array_base + envp_array_size; 155 IntType arg_data_base = auxv_array_base + auxv_array_size; 156 IntType env_data_base = arg_data_base + arg_data_size; 157 158 // write contents to stack 159 IntType argc = argv.size(); 160 161 argc = htog((IntType)argc); 162
|
162 initVirtMem.writeBlob(stack_min, (uint8_t*)&argc, intSize);
| 163 initVirtMem.writeBlob(memState->stackMin, (uint8_t*)&argc, intSize);
|
163 164 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 165 166 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 167 168 // Copy the aux vector 169 for (typename vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) { 170 initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, 171 (uint8_t*)&(auxv[x].a_type), intSize); 172 initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 173 (uint8_t*)&(auxv[x].a_val), intSize); 174 } 175 176 // Write out the terminating zeroed auxilliary vector 177 for (unsigned i = 0; i < 2; i++) { 178 const IntType zero = 0; 179 const Addr addr = auxv_array_base + 2 * intSize * (auxv.size() + i); 180 initVirtMem.writeBlob(addr, (uint8_t*)&zero, intSize); 181 } 182 183 ThreadContext *tc = system->getThreadContext(contextIds[0]); 184 185 setSyscallArg(tc, 0, argc); 186 setSyscallArg(tc, 1, argv_array_base);
| 164 165 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 166 167 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 168 169 // Copy the aux vector 170 for (typename vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) { 171 initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, 172 (uint8_t*)&(auxv[x].a_type), intSize); 173 initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 174 (uint8_t*)&(auxv[x].a_val), intSize); 175 } 176 177 // Write out the terminating zeroed auxilliary vector 178 for (unsigned i = 0; i < 2; i++) { 179 const IntType zero = 0; 180 const Addr addr = auxv_array_base + 2 * intSize * (auxv.size() + i); 181 initVirtMem.writeBlob(addr, (uint8_t*)&zero, intSize); 182 } 183 184 ThreadContext *tc = system->getThreadContext(contextIds[0]); 185 186 setSyscallArg(tc, 0, argc); 187 setSyscallArg(tc, 1, argv_array_base);
|
187 tc->setIntReg(StackPointerReg, stack_min);
| 188 tc->setIntReg(StackPointerReg, memState->stackMin);
|
188 189 tc->pcState(getStartPC()); 190} 191 192 193MipsISA::IntReg 194MipsProcess::getSyscallArg(ThreadContext *tc, int &i) 195{ 196 assert(i < 6); 197 return tc->readIntReg(FirstArgumentReg + i++); 198} 199 200void 201MipsProcess::setSyscallArg(ThreadContext *tc, int i, MipsISA::IntReg val) 202{ 203 assert(i < 6); 204 tc->setIntReg(FirstArgumentReg + i, val); 205} 206 207void 208MipsProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) 209{ 210 if (sysret.successful()) { 211 // no error 212 tc->setIntReg(SyscallSuccessReg, 0); 213 tc->setIntReg(ReturnValueReg, sysret.returnValue()); 214 } else { 215 // got an error, return details 216 tc->setIntReg(SyscallSuccessReg, (IntReg) -1); 217 tc->setIntReg(ReturnValueReg, sysret.errnoValue()); 218 } 219}
| 189 190 tc->pcState(getStartPC()); 191} 192 193 194MipsISA::IntReg 195MipsProcess::getSyscallArg(ThreadContext *tc, int &i) 196{ 197 assert(i < 6); 198 return tc->readIntReg(FirstArgumentReg + i++); 199} 200 201void 202MipsProcess::setSyscallArg(ThreadContext *tc, int i, MipsISA::IntReg val) 203{ 204 assert(i < 6); 205 tc->setIntReg(FirstArgumentReg + i, val); 206} 207 208void 209MipsProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) 210{ 211 if (sysret.successful()) { 212 // no error 213 tc->setIntReg(SyscallSuccessReg, 0); 214 tc->setIntReg(ReturnValueReg, sysret.returnValue()); 215 } else { 216 // got an error, return details 217 tc->setIntReg(SyscallSuccessReg, (IntReg) -1); 218 tc->setIntReg(ReturnValueReg, sysret.errnoValue()); 219 } 220}
|