pagetable.hh (8763:509e9bb84dfa) pagetable.hh (10558:426665ec11a9)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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78 void unserialize(Checkpoint *cp, const std::string &section);
79};
80
81// WARN: This particular TLB entry is not necessarily conformed to MIPS ISA
82struct TlbEntry
83{
84 Addr _pageStart;
85 TlbEntry() {}
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

--- 69 unchanged lines hidden (view full) ---

78 void unserialize(Checkpoint *cp, const std::string &section);
79};
80
81// WARN: This particular TLB entry is not necessarily conformed to MIPS ISA
82struct TlbEntry
83{
84 Addr _pageStart;
85 TlbEntry() {}
86 TlbEntry(Addr asn, Addr vaddr, Addr paddr) : _pageStart(paddr) {}
86 TlbEntry(Addr asn, Addr vaddr, Addr paddr,
87 bool uncacheable, bool read_only)
88 : _pageStart(paddr)
89 {
90 if (uncacheable || read_only)
91 warn("MIPS TlbEntry does not support uncacheable"
92 " or read-only mappings\n");
93 }
87
88 Addr pageStart()
89 {
90 return _pageStart;
91 }
92
93 void
94 updateVaddr(Addr new_vaddr) {}

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95 Addr pageStart()
96 {
97 return _pageStart;
98 }
99
100 void
101 updateVaddr(Addr new_vaddr) {}

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