1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007 MIPS Technologies, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 51 unchanged lines hidden (view full) --- 60 uint8_t C0; // Cache Coherency Bits - Even 61 62 /* Contents of Entry Lo1 */ 63 Addr PFN1; // Physical Frame Number - Odd 64 bool D1; // Odd entry Dirty Bit 65 bool V1; // Odd entry Valid Bit 66 uint8_t C1; // Cache Coherency Bits (3 bits) 67 |
68 /* |
69 * The next few variables are put in as optimizations to reduce 70 * TLB lookup overheads. For a given Mask, what is the address shift 71 * amount, and what is the OffsetMask 72 */ 73 int AddrShiftAmount; 74 int OffsetMask; 75 76 bool Valid() { return (V0 | V1); }; --- 41 unchanged lines hidden --- |