1/* 2 * Copyright (c) 2007 MIPS Technologies, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Korey Sewell 29 * Jaidev Patwardhan 30 */ 31 32#ifndef __ARCH_MIPS_MT_CONSTANTS_HH__ 33#define __ARCH_MIPS_MT_CONSTANTS_HH__ 34 35#include "arch/mips/types.hh"
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36#include "base/bitunion.hh" |
37 38namespace MipsISA 39{
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39// MVPControl
40const unsigned MVPC_EVP = 0;
41const unsigned MVPC_CUR_VPE_HI = 3;
42const unsigned MVPC_CUR_VPE_LO = 0;
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40
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44// MVPConf0
45const unsigned MVPC0_TCA = 15;
46const unsigned MVPC0_PVPE_HI = 13;
47const unsigned MVPC0_PVPE_LO = 10;
48const unsigned MVPC0_PTC_HI = 7;
49const unsigned MVPC0_PTC_LO = 0;
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41BitUnion32(MVPControlReg) 42 Bitfield<3> cpa; 43 Bitfield<2> stlb; 44 Bitfield<1> vpc; 45 Bitfield<0> evp; 46EndBitUnion(MVPControlReg) |
47
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51//VPEControl
52const unsigned VPEC_YSI = 21;
53const unsigned VPEC_EXCPT_HI = 18;
54const unsigned VPEC_EXCPT_LO = 16;
55const unsigned VPEC_TE = 15;
56const unsigned VPEC_TARG_TC_HI = 7;
57const unsigned VPEC_TARG_TC_LO = 0;
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48BitUnion32(MVPConf0Reg) 49 Bitfield<31> m; 50 Bitfield<29> tlbs; 51 Bitfield<28> gs; 52 Bitfield<27> pcp; 53 Bitfield<25, 16> ptlbe; 54 Bitfield<15> tca; 55 Bitfield<13, 10> pvpe; 56 Bitfield<7, 0> ptc; 57EndBitUnion(MVPConf0Reg) |
58
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59//VPEConf0
60const unsigned VPEC0_MVP = 1;
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59BitUnion32(VPEControlReg) 60 Bitfield<21> ysi; 61 Bitfield<18, 16> excpt; 62 Bitfield<15> te; 63 Bitfield<7, 0> targTC; 64EndBitUnion(VPEControlReg) |
65
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62//TCBind
63const unsigned TCB_CUR_VPE_HI = 3;
64const unsigned TCB_CUR_VPE_LO = 0;
65const unsigned TCB_CUR_TC_HI = 28;
66const unsigned TCB_CUR_TC_LO = 21;
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66BitUnion32(VPEConf0Reg) 67 Bitfield<31> m; 68 Bitfield<28, 21> xtc; 69 Bitfield<19> tcs; 70 Bitfield<18> scs; 71 Bitfield<17> dcs; 72 Bitfield<16> ics; 73 Bitfield<1> mvp; 74 Bitfield<0> vpa; 75EndBitUnion(VPEConf0Reg) |
76
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77BitUnion32(TCBindReg) 78 Bitfield<28, 21> curTC; 79 Bitfield<20, 18> a0; 80 Bitfield<17> tbe; 81 Bitfield<3, 0> curVPE; 82EndBitUnion(TCBindReg) |
83
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69//TCStatus
70const unsigned TCS_TCU_HI = 31;
71const unsigned TCS_TCU_LO = 28;
72const unsigned TCS_TMX = 27;
73const unsigned TCS_DT = 20;
74const unsigned TCS_DA = 15;
75const unsigned TCS_A = 13;
76const unsigned TCS_TKSU_HI = 12;
77const unsigned TCS_TKSU_LO = 11;
78const unsigned TCS_IXMT = 7;
79const unsigned TCS_ASID_HI = 7;
80const unsigned TCS_ASID_LO = 7;
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84BitUnion32(TCStatusReg) 85 Bitfield<31, 28> tcu; 86 Bitfield<27> tmx; 87 Bitfield<24, 23> rnst; 88 Bitfield<21> tds; 89 Bitfield<20> dt; 90 Bitfield<19, 16> impl; 91 Bitfield<15> da; 92 Bitfield<13> a; 93 Bitfield<12, 11> tksu; 94 Bitfield<10> ixmt; 95 Bitfield<7, 0> asid; 96EndBitUnion(TCStatusReg) |
97
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82const unsigned TCSTATUS_TCU_HI = 31;
83const unsigned TCSTATUS_TCU_LO = 28;
84const unsigned TCSTATUS_TMX = 27;
85const unsigned TCSTATUS_RNST_HI = 24;
86const unsigned TCSTATUS_RNST_LO = 23;
87const unsigned TCSTATUS_TDS = 21;
88const unsigned TCSTATUS_DT = 20;
89const unsigned TCSTATUS_DA = 15;
90const unsigned TCSTATUS_A = 13;
91const unsigned TCSTATUS_TKSU_HI = 12;
92const unsigned TCSTATUS_TKSU_LO = 11;
93const unsigned TCSTATUS_IXMT = 7;
94const unsigned TCSTATUS_ASID_HI = 7;
95const unsigned TCSTATUS_ASID_LO = 7;
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98BitUnion32(TCHaltReg) 99 Bitfield<0> h; 100EndBitUnion(TCHaltReg) |
101
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97//TCHalt
98const unsigned TCH_H = 0;
99
100//Status
101const unsigned S_CU_HI = 31;
102const unsigned S_CU_LO = 28;
103const unsigned S_MX = 24;
104const unsigned S_KSU_HI = 4;
105const unsigned S_KSU_LO = 3;
106
107// Config0
108const unsigned CFG_M = 31;
109
110// Config1
111const unsigned CFG1_M = 31;
112
113// Config2
114const unsigned CFG2_M = 31;
115
116// Config3
117const unsigned CFG3_M = 31;
118const unsigned CFG3_MT = 2;
119
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102} // namespace MipsISA 103 104#endif
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