mt.hh (10474:799c8ee4ecba) | mt.hh (12104:edd63f9c6184) |
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1/* 2 * Copyright (c) 2007 MIPS Technologies, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 99 unchanged lines hidden (view full) --- 108forkThread(TC *tc, Fault &fault, int Rd_bits, int Rs, int Rt) 109{ 110 MVPConf0Reg mvpConf = tc->readMiscRegNoEffect(MISCREG_MVP_CONF0); 111 int num_threads = mvpConf.ptc + 1; 112 113 int success = 0; 114 for (ThreadID tid = 0; tid < num_threads && success == 0; tid++) { 115 TCBindReg tidTCBind = | 1/* 2 * Copyright (c) 2007 MIPS Technologies, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 99 unchanged lines hidden (view full) --- 108forkThread(TC *tc, Fault &fault, int Rd_bits, int Rs, int Rt) 109{ 110 MVPConf0Reg mvpConf = tc->readMiscRegNoEffect(MISCREG_MVP_CONF0); 111 int num_threads = mvpConf.ptc + 1; 112 113 int success = 0; 114 for (ThreadID tid = 0; tid < num_threads && success == 0; tid++) { 115 TCBindReg tidTCBind = |
116 tc->readRegOtherThread(MISCREG_TC_BIND + Misc_Reg_Base, tid); | 116 tc->readRegOtherThread(RegId(MiscRegClass, MISCREG_TC_BIND), tid); |
117 TCBindReg tcBind = tc->readMiscRegNoEffect(MISCREG_TC_BIND); 118 119 if (tidTCBind.curVPE == tcBind.curVPE) { 120 121 TCStatusReg tidTCStatus = | 117 TCBindReg tcBind = tc->readMiscRegNoEffect(MISCREG_TC_BIND); 118 119 if (tidTCBind.curVPE == tcBind.curVPE) { 120 121 TCStatusReg tidTCStatus = |
122 tc->readRegOtherThread(MISCREG_TC_STATUS + 123 Misc_Reg_Base,tid); | 122 tc->readRegOtherThread(RegId(MiscRegClass, MISCREG_TC_STATUS), 123 tid); |
124 125 TCHaltReg tidTCHalt = | 124 125 TCHaltReg tidTCHalt = |
126 tc->readRegOtherThread(MISCREG_TC_HALT + Misc_Reg_Base,tid); | 126 tc->readRegOtherThread(RegId(MiscRegClass, MISCREG_TC_HALT), 127 tid); |
127 128 if (tidTCStatus.da == 1 && tidTCHalt.h == 0 && 129 tidTCStatus.a == 0 && success == 0) { 130 | 128 129 if (tidTCStatus.da == 1 && tidTCHalt.h == 0 && 130 tidTCStatus.a == 0 && success == 0) { 131 |
131 tc->setRegOtherThread(MISCREG_TC_RESTART + 132 Misc_Reg_Base, Rs, tid); 133 tc->setRegOtherThread(Rd_bits, Rt, tid); | 132 tc->setRegOtherThread(RegId(MiscRegClass, MISCREG_TC_RESTART), 133 Rs, tid); 134 tc->setRegOtherThread(RegId(IntRegClass, Rd_bits), Rt, tid); |
134 135 StatusReg status = tc->readMiscReg(MISCREG_STATUS); 136 TCStatusReg tcStatus = tc->readMiscReg(MISCREG_TC_STATUS); 137 138 // Set Run-State to Running 139 tidTCStatus.rnst = 0; 140 // Set Delay-Slot to 0 141 tidTCStatus.tds = 0; 142 // Set Dirty TC to 1 143 tidTCStatus.dt = 1; 144 // Set Activated to 1 145 tidTCStatus.a = 1; 146 // Set status to previous thread's status 147 tidTCStatus.tksu = status.ksu; 148 // Set ASID to previous thread's state 149 tidTCStatus.asid = tcStatus.asid; 150 151 // Write Status Register | 135 136 StatusReg status = tc->readMiscReg(MISCREG_STATUS); 137 TCStatusReg tcStatus = tc->readMiscReg(MISCREG_TC_STATUS); 138 139 // Set Run-State to Running 140 tidTCStatus.rnst = 0; 141 // Set Delay-Slot to 0 142 tidTCStatus.tds = 0; 143 // Set Dirty TC to 1 144 tidTCStatus.dt = 1; 145 // Set Activated to 1 146 tidTCStatus.a = 1; 147 // Set status to previous thread's status 148 tidTCStatus.tksu = status.ksu; 149 // Set ASID to previous thread's state 150 tidTCStatus.asid = tcStatus.asid; 151 152 // Write Status Register |
152 tc->setRegOtherThread(MISCREG_TC_STATUS + Misc_Reg_Base, | 153 tc->setRegOtherThread(RegId(MiscRegClass, MISCREG_TC_STATUS), |
153 tidTCStatus, tid); 154 155 // Mark As Successful Fork 156 success = 1; 157 } 158 } else { 159 std::cerr << "Bad VPEs" << std::endl; 160 } --- 19 unchanged lines hidden (view full) --- 180 181 int ok = 0; 182 183 // Get Current VPE & TC numbers from calling thread 184 TCBindReg tcBind = tc->readMiscRegNoEffect(MISCREG_TC_BIND); 185 186 for (ThreadID tid = 0; tid < num_threads; tid++) { 187 TCStatusReg tidTCStatus = | 154 tidTCStatus, tid); 155 156 // Mark As Successful Fork 157 success = 1; 158 } 159 } else { 160 std::cerr << "Bad VPEs" << std::endl; 161 } --- 19 unchanged lines hidden (view full) --- 181 182 int ok = 0; 183 184 // Get Current VPE & TC numbers from calling thread 185 TCBindReg tcBind = tc->readMiscRegNoEffect(MISCREG_TC_BIND); 186 187 for (ThreadID tid = 0; tid < num_threads; tid++) { 188 TCStatusReg tidTCStatus = |
188 tc->readRegOtherThread(MISCREG_TC_STATUS + Misc_Reg_Base, | 189 tc->readRegOtherThread(RegId(MiscRegClass, MISCREG_TC_STATUS), |
189 tid); 190 TCHaltReg tidTCHalt = | 190 tid); 191 TCHaltReg tidTCHalt = |
191 tc->readRegOtherThread(MISCREG_TC_HALT + Misc_Reg_Base, | 192 tc->readRegOtherThread(RegId(MiscRegClass, MISCREG_TC_HALT), |
192 tid); 193 TCBindReg tidTCBind = | 193 tid); 194 TCBindReg tidTCBind = |
194 tc->readRegOtherThread(MISCREG_TC_BIND + Misc_Reg_Base, | 195 tc->readRegOtherThread(RegId(MiscRegClass, MISCREG_TC_BIND), |
195 tid); 196 197 if (tidTCBind.curVPE == tcBind.curVPE && 198 tidTCBind.curTC == tcBind.curTC && 199 tidTCStatus.da == 1 && 200 tidTCHalt.h == 0 && 201 tidTCStatus.a == 1) { 202 ok = 1; --- 74 unchanged lines hidden --- | 196 tid); 197 198 if (tidTCBind.curVPE == tcBind.curVPE && 199 tidTCBind.curTC == tcBind.curTC && 200 tidTCStatus.da == 1 && 201 tidTCHalt.h == 0 && 202 tidTCStatus.a == 1) { 203 ok = 1; --- 74 unchanged lines hidden --- |