1// -*- mode:c++ -*- 2 3// Copyright (c) 2007 MIPS Technologies, Inc. 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 38 unchanged lines hidden (view full) --- 47output decoder {{ 48#include <math.h> 49 50#include "arch/mips/dsp.hh" 51#include "arch/mips/dt_constants.hh" 52#include "arch/mips/faults.hh" 53#include "arch/mips/isa_traits.hh" 54#include "arch/mips/mt_constants.hh" |
55#include "arch/mips/pra_constants.hh" |
56#include "arch/mips/utility.hh" 57#include "base/loader/symtab.hh" 58#include "base/cprintf.hh" 59#include "cpu/thread_context.hh" 60#include "mem/packet.hh" |
61#include "sim/full_system.hh" |
62#if defined(linux) 63#include <fenv.h> 64#endif 65 66using namespace MipsISA; 67}}; 68 69output exec {{ --- 16 unchanged lines hidden (view full) --- 86 87#include "base/condcodes.hh" 88#include "cpu/base.hh" 89#include "cpu/exetrace.hh" 90#include "debug/MipsPRA.hh" 91#include "mem/packet.hh" 92#include "mem/packet_access.hh" 93#include "sim/eventq.hh" |
94#include "sim/full_system.hh" |
95#include "sim/sim_events.hh" 96#include "sim/sim_exit.hh" 97 98using namespace MipsISA; 99}}; 100 |