1// -*- mode:c++ -*-
2
3// Copyright (c) 2006 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

--- 30 unchanged lines hidden (view full) ---

39#include <iomanip>
40
41#include "arch/mips/isa_traits.hh"
42#include "cpu/static_inst.hh"
43#include "mem/packet.hh"
44}};
45
46output decoder {{
47#include "arch/mips/isa_traits.hh"
48#include "base/cprintf.hh"
49#include "base/loader/symtab.hh"
50#include "cpu/thread_context.hh"
51#include "arch/mips/faults.hh"
52#include "arch/mips/isa_traits.hh"
53#include "arch/mips/pra_constants.hh"
54#include "arch/mips/dt_constants.hh"
55#include "arch/mips/mt_constants.hh"
56#include "arch/mips/utility.hh"
57#include "arch/mips/dsp.hh"
58#include "mem/packet.hh"
59
60#include <math.h>
61#if defined(linux)
62#include <fenv.h>
63#endif
64
65using namespace MipsISA;
66}};
67
68output exec {{
69#include "arch/mips/faults.hh"
70#include "arch/mips/isa_traits.hh"
71#include "arch/mips/utility.hh"
72#include "arch/mips/dsp.hh"
73#include "arch/mips/pra_constants.hh"
74#include "arch/mips/dt_constants.hh"
75#include "arch/mips/mt_constants.hh"
76
77#include <math.h>
78#if defined(linux)
79#include <fenv.h>
80#endif
81
82#include "cpu/base.hh"
83#include "cpu/exetrace.hh"
84
85#include "mem/packet.hh"
86#include "mem/packet_access.hh"
87
88#include "sim/sim_exit.hh"
89#include "sim/eventq.hh"
90#include "sim/sim_events.hh"
91
92using namespace MipsISA;
93}};
94