util.isa (6207:c47f3e877a57) | util.isa (7045:e21fe6a62b1c) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2003-2005 The Regents of The University of Michigan 4// Copyright (c) 2007 MIPS Technologies, Inc. 5// All rights reserved. 6// 7// Redistribution and use in source and binary forms, with or without 8// modification, are permitted provided that the following conditions are --- 24 unchanged lines hidden (view full) --- 33let {{ 34def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 35 postacc_code = '', base_class = 'Memory', 36 decode_template = BasicDecode, exec_template_base = ''): 37 # Make sure flags are in lists (convert to lists if not). 38 mem_flags = makeList(mem_flags) 39 inst_flags = makeList(inst_flags) 40 | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2003-2005 The Regents of The University of Michigan 4// Copyright (c) 2007 MIPS Technologies, Inc. 5// All rights reserved. 6// 7// Redistribution and use in source and binary forms, with or without 8// modification, are permitted provided that the following conditions are --- 24 unchanged lines hidden (view full) --- 33let {{ 34def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 35 postacc_code = '', base_class = 'Memory', 36 decode_template = BasicDecode, exec_template_base = ''): 37 # Make sure flags are in lists (convert to lists if not). 38 mem_flags = makeList(mem_flags) 39 inst_flags = makeList(inst_flags) 40 |
41 # add hook to get effective addresses into execution trace output. 42 ea_code += '\nif (traceData) { traceData->setAddr(EA); }\n' 43 | |
44 # Some CPU models execute the memory operation as an atomic unit, 45 # while others want to separate them into an effective address 46 # computation and a memory access operation. As a result, we need 47 # to generate three StaticInst objects. Note that the latter two 48 # are nested inside the larger "atomic" one. 49 50 # Generate InstObjParams for each of the three objects. Note that 51 # they differ only in the set of code objects contained (which in --- 55 unchanged lines hidden --- | 41 # Some CPU models execute the memory operation as an atomic unit, 42 # while others want to separate them into an effective address 43 # computation and a memory access operation. As a result, we need 44 # to generate three StaticInst objects. Note that the latter two 45 # are nested inside the larger "atomic" one. 46 47 # Generate InstObjParams for each of the three objects. Note that 48 # they differ only in the set of code objects contained (which in --- 55 unchanged lines hidden --- |