util.isa (6207:c47f3e877a57) util.isa (7045:e21fe6a62b1c)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// Copyright (c) 2007 MIPS Technologies, Inc.
5// All rights reserved.
6//
7// Redistribution and use in source and binary forms, with or without
8// modification, are permitted provided that the following conditions are
9// met: redistributions of source code must retain the above copyright
10// notice, this list of conditions and the following disclaimer;
11// redistributions in binary form must reproduce the above copyright
12// notice, this list of conditions and the following disclaimer in the
13// documentation and/or other materials provided with the distribution;
14// neither the name of the copyright holders nor the names of its
15// contributors may be used to endorse or promote products derived from
16// this software without specific prior written permission.
17//
18// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29//
30// Authors: Steve Reinhardt
31// Korey Sewell
32
33let {{
34def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
35 postacc_code = '', base_class = 'Memory',
36 decode_template = BasicDecode, exec_template_base = ''):
37 # Make sure flags are in lists (convert to lists if not).
38 mem_flags = makeList(mem_flags)
39 inst_flags = makeList(inst_flags)
40
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// Copyright (c) 2007 MIPS Technologies, Inc.
5// All rights reserved.
6//
7// Redistribution and use in source and binary forms, with or without
8// modification, are permitted provided that the following conditions are
9// met: redistributions of source code must retain the above copyright
10// notice, this list of conditions and the following disclaimer;
11// redistributions in binary form must reproduce the above copyright
12// notice, this list of conditions and the following disclaimer in the
13// documentation and/or other materials provided with the distribution;
14// neither the name of the copyright holders nor the names of its
15// contributors may be used to endorse or promote products derived from
16// this software without specific prior written permission.
17//
18// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29//
30// Authors: Steve Reinhardt
31// Korey Sewell
32
33let {{
34def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
35 postacc_code = '', base_class = 'Memory',
36 decode_template = BasicDecode, exec_template_base = ''):
37 # Make sure flags are in lists (convert to lists if not).
38 mem_flags = makeList(mem_flags)
39 inst_flags = makeList(inst_flags)
40
41 # add hook to get effective addresses into execution trace output.
42 ea_code += '\nif (traceData) { traceData->setAddr(EA); }\n'
43
44 # Some CPU models execute the memory operation as an atomic unit,
45 # while others want to separate them into an effective address
46 # computation and a memory access operation. As a result, we need
47 # to generate three StaticInst objects. Note that the latter two
48 # are nested inside the larger "atomic" one.
49
50 # Generate InstObjParams for each of the three objects. Note that
51 # they differ only in the set of code objects contained (which in
52 # turn affects the object's overall operand list).
53 iop = InstObjParams(name, Name, base_class,
54 { 'ea_code':ea_code, 'memacc_code':memacc_code, 'postacc_code':postacc_code },
55 inst_flags)
56
57 if mem_flags:
58 mem_flags = [ 'Request::%s' % flag for flag in mem_flags ]
59 s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
60 iop.constructor += s
61
62 # select templates
63
64 # The InitiateAcc template is the same for StoreCond templates as the
65 # corresponding Store template..
66 StoreCondInitiateAcc = StoreInitiateAcc
67
68 fullExecTemplate = eval(exec_template_base + 'Execute')
69 initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
70 completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
71
72 # (header_output, decoder_output, decode_block, exec_output)
73 return (LoadStoreDeclare.subst(iop),
74 LoadStoreConstructor.subst(iop),
75 decode_template.subst(iop),
76 fullExecTemplate.subst(iop)
77 + EACompExecute.subst(iop)
78 + initiateAccTemplate.subst(iop)
79 + completeAccTemplate.subst(iop))
80}};
81
82output header {{
83 std::string inst2string(MachInst machInst);
84}};
85
86output decoder {{
87
88std::string inst2string(MachInst machInst)
89{
90 string str = "";
91 uint32_t mask = 0x80000000;
92
93 for(int i=0; i < 32; i++) {
94 if ((machInst & mask) == 0) {
95 str += "0";
96 } else {
97 str += "1";
98 }
99
100 mask = mask >> 1;
101 }
102
103 return str;
104}
105
106}};
41 # Some CPU models execute the memory operation as an atomic unit,
42 # while others want to separate them into an effective address
43 # computation and a memory access operation. As a result, we need
44 # to generate three StaticInst objects. Note that the latter two
45 # are nested inside the larger "atomic" one.
46
47 # Generate InstObjParams for each of the three objects. Note that
48 # they differ only in the set of code objects contained (which in
49 # turn affects the object's overall operand list).
50 iop = InstObjParams(name, Name, base_class,
51 { 'ea_code':ea_code, 'memacc_code':memacc_code, 'postacc_code':postacc_code },
52 inst_flags)
53
54 if mem_flags:
55 mem_flags = [ 'Request::%s' % flag for flag in mem_flags ]
56 s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
57 iop.constructor += s
58
59 # select templates
60
61 # The InitiateAcc template is the same for StoreCond templates as the
62 # corresponding Store template..
63 StoreCondInitiateAcc = StoreInitiateAcc
64
65 fullExecTemplate = eval(exec_template_base + 'Execute')
66 initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
67 completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
68
69 # (header_output, decoder_output, decode_block, exec_output)
70 return (LoadStoreDeclare.subst(iop),
71 LoadStoreConstructor.subst(iop),
72 decode_template.subst(iop),
73 fullExecTemplate.subst(iop)
74 + EACompExecute.subst(iop)
75 + initiateAccTemplate.subst(iop)
76 + completeAccTemplate.subst(iop))
77}};
78
79output header {{
80 std::string inst2string(MachInst machInst);
81}};
82
83output decoder {{
84
85std::string inst2string(MachInst machInst)
86{
87 string str = "";
88 uint32_t mask = 0x80000000;
89
90 for(int i=0; i < 32; i++) {
91 if ((machInst & mask) == 0) {
92 str += "0";
93 } else {
94 str += "1";
95 }
96
97 mask = mask >> 1;
98 }
99
100 return str;
101}
102
103}};