util.isa (2632:1bb2f91485ea) util.isa (2686:f0d591379ac3)
1// -*- mode:c++ -*-
2
3let {{
4def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
5 postacc_code = '', base_class = 'Memory',
6 decode_template = BasicDecode, exec_template_base = ''):
7 # Make sure flags are in lists (convert to lists if not).
8 mem_flags = makeList(mem_flags)
9 inst_flags = makeList(inst_flags)
10
11 # add hook to get effective addresses into execution trace output.
12 ea_code += '\nif (traceData) { traceData->setAddr(EA); }\n'
13
14 # generate code block objects
15 ea_cblk = CodeBlock(ea_code)
16 memacc_cblk = CodeBlock(memacc_code)
17 postacc_cblk = CodeBlock(postacc_code)
18
19 # Some CPU models execute the memory operation as an atomic unit,
20 # while others want to separate them into an effective address
21 # computation and a memory access operation. As a result, we need
22 # to generate three StaticInst objects. Note that the latter two
23 # are nested inside the larger "atomic" one.
24
25 # generate InstObjParams for EAComp object
26 ea_iop = InstObjParams(name, Name, base_class, ea_cblk, inst_flags)
27
28 # generate InstObjParams for MemAcc object
29 memacc_iop = InstObjParams(name, Name, base_class, memacc_cblk, inst_flags)
30 # in the split execution model, the MemAcc portion is responsible
31 # for the post-access code.
32 memacc_iop.postacc_code = postacc_cblk.code
33
34 # generate InstObjParams for InitiateAcc, CompleteAcc object
35 # The code used depends on the template being used
36 if (exec_template_base == 'Load'):
37 initiateacc_cblk = CodeBlock(ea_code + memacc_code)
38 completeacc_cblk = CodeBlock(memacc_code + postacc_code)
39 elif (exec_template_base == 'Store'):
40 initiateacc_cblk = CodeBlock(ea_code + memacc_code)
41 completeacc_cblk = CodeBlock(postacc_code)
42 else:
43 initiateacc_cblk = ''
44 completeacc_cblk = ''
45
46 initiateacc_iop = InstObjParams(name, Name, base_class, initiateacc_cblk,
47 inst_flags)
48
49 completeacc_iop = InstObjParams(name, Name, base_class, completeacc_cblk,
50 inst_flags)
51
52 if (exec_template_base == 'Load'):
53 initiateacc_iop.ea_code = ea_cblk.code
54 initiateacc_iop.memacc_code = memacc_cblk.code
55 completeacc_iop.memacc_code = memacc_cblk.code
56 completeacc_iop.postacc_code = postacc_cblk.code
57 elif (exec_template_base == 'Store'):
58 initiateacc_iop.ea_code = ea_cblk.code
59 initiateacc_iop.memacc_code = memacc_cblk.code
60 completeacc_iop.postacc_code = postacc_cblk.code
61
62 # generate InstObjParams for unified execution
63 cblk = CodeBlock(ea_code + memacc_code + postacc_code)
64 iop = InstObjParams(name, Name, base_class, cblk, inst_flags)
65
66 iop.ea_constructor = ea_cblk.constructor
67 iop.ea_code = ea_cblk.code
68 iop.memacc_constructor = memacc_cblk.constructor
69 iop.memacc_code = memacc_cblk.code
70 iop.postacc_code = postacc_cblk.code
71
72 if mem_flags:
73 s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
74 iop.constructor += s
75 memacc_iop.constructor += s
76
77 # select templates
78 memAccExecTemplate = eval(exec_template_base + 'MemAccExecute')
79 fullExecTemplate = eval(exec_template_base + 'Execute')
80 initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
81 completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
82
83 # (header_output, decoder_output, decode_block, exec_output)
84 return (LoadStoreDeclare.subst(iop), LoadStoreConstructor.subst(iop),
85 decode_template.subst(iop),
86 EACompExecute.subst(ea_iop)
87 + memAccExecTemplate.subst(memacc_iop)
88 + fullExecTemplate.subst(iop)
89 + initiateAccTemplate.subst(initiateacc_iop)
90 + completeAccTemplate.subst(completeacc_iop))
91}};
92
1// -*- mode:c++ -*-
2
3let {{
4def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
5 postacc_code = '', base_class = 'Memory',
6 decode_template = BasicDecode, exec_template_base = ''):
7 # Make sure flags are in lists (convert to lists if not).
8 mem_flags = makeList(mem_flags)
9 inst_flags = makeList(inst_flags)
10
11 # add hook to get effective addresses into execution trace output.
12 ea_code += '\nif (traceData) { traceData->setAddr(EA); }\n'
13
14 # generate code block objects
15 ea_cblk = CodeBlock(ea_code)
16 memacc_cblk = CodeBlock(memacc_code)
17 postacc_cblk = CodeBlock(postacc_code)
18
19 # Some CPU models execute the memory operation as an atomic unit,
20 # while others want to separate them into an effective address
21 # computation and a memory access operation. As a result, we need
22 # to generate three StaticInst objects. Note that the latter two
23 # are nested inside the larger "atomic" one.
24
25 # generate InstObjParams for EAComp object
26 ea_iop = InstObjParams(name, Name, base_class, ea_cblk, inst_flags)
27
28 # generate InstObjParams for MemAcc object
29 memacc_iop = InstObjParams(name, Name, base_class, memacc_cblk, inst_flags)
30 # in the split execution model, the MemAcc portion is responsible
31 # for the post-access code.
32 memacc_iop.postacc_code = postacc_cblk.code
33
34 # generate InstObjParams for InitiateAcc, CompleteAcc object
35 # The code used depends on the template being used
36 if (exec_template_base == 'Load'):
37 initiateacc_cblk = CodeBlock(ea_code + memacc_code)
38 completeacc_cblk = CodeBlock(memacc_code + postacc_code)
39 elif (exec_template_base == 'Store'):
40 initiateacc_cblk = CodeBlock(ea_code + memacc_code)
41 completeacc_cblk = CodeBlock(postacc_code)
42 else:
43 initiateacc_cblk = ''
44 completeacc_cblk = ''
45
46 initiateacc_iop = InstObjParams(name, Name, base_class, initiateacc_cblk,
47 inst_flags)
48
49 completeacc_iop = InstObjParams(name, Name, base_class, completeacc_cblk,
50 inst_flags)
51
52 if (exec_template_base == 'Load'):
53 initiateacc_iop.ea_code = ea_cblk.code
54 initiateacc_iop.memacc_code = memacc_cblk.code
55 completeacc_iop.memacc_code = memacc_cblk.code
56 completeacc_iop.postacc_code = postacc_cblk.code
57 elif (exec_template_base == 'Store'):
58 initiateacc_iop.ea_code = ea_cblk.code
59 initiateacc_iop.memacc_code = memacc_cblk.code
60 completeacc_iop.postacc_code = postacc_cblk.code
61
62 # generate InstObjParams for unified execution
63 cblk = CodeBlock(ea_code + memacc_code + postacc_code)
64 iop = InstObjParams(name, Name, base_class, cblk, inst_flags)
65
66 iop.ea_constructor = ea_cblk.constructor
67 iop.ea_code = ea_cblk.code
68 iop.memacc_constructor = memacc_cblk.constructor
69 iop.memacc_code = memacc_cblk.code
70 iop.postacc_code = postacc_cblk.code
71
72 if mem_flags:
73 s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
74 iop.constructor += s
75 memacc_iop.constructor += s
76
77 # select templates
78 memAccExecTemplate = eval(exec_template_base + 'MemAccExecute')
79 fullExecTemplate = eval(exec_template_base + 'Execute')
80 initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
81 completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
82
83 # (header_output, decoder_output, decode_block, exec_output)
84 return (LoadStoreDeclare.subst(iop), LoadStoreConstructor.subst(iop),
85 decode_template.subst(iop),
86 EACompExecute.subst(ea_iop)
87 + memAccExecTemplate.subst(memacc_iop)
88 + fullExecTemplate.subst(iop)
89 + initiateAccTemplate.subst(initiateacc_iop)
90 + completeAccTemplate.subst(completeacc_iop))
91}};
92
93output header {{
94 std::string inst2string(MachInst machInst);
95}};
93
96
97output decoder {{
98
99std::string inst2string(MachInst machInst)
100{
101 string str = "";
102 uint32_t mask = 0x80000000;
103
104 for(int i=0; i < 32; i++) {
105 if ((machInst & mask) == 0) {
106 str += "0";
107 } else {
108 str += "1";
109 }
110
111 mask = mask >> 1;
112 }
113
114 return str;
115}
116
117}};
94output exec {{
95
96 using namespace MipsISA;
97
98 /// CLEAR ALL CPU INST/EXE HAZARDS
99 inline void
100 clear_exe_inst_hazards()
101 {
102 //CODE HERE
103 }
104
105
106 /// Check "FP enabled" machine status bit. Called when executing any FP
107 /// instruction in full-system mode.
108 /// @retval Full-system mode: NoFault if FP is enabled, FenFault
109 /// if not. Non-full-system mode: always returns NoFault.
110#if FULL_SYSTEM
111 inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc)
112 {
113 Fault fault = NoFault; // dummy... this ipr access should not fault
114 if (!Mips34k::ICSR_FPE(xc->readIpr(MipsISA::IPR_ICSR, fault))) {
115 fault = FloatEnableFault;
116 }
117 return fault;
118 }
119#else
120 inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc)
121 {
122 return NoFault;
123 }
124#endif
125
126
118output exec {{
119
120 using namespace MipsISA;
121
122 /// CLEAR ALL CPU INST/EXE HAZARDS
123 inline void
124 clear_exe_inst_hazards()
125 {
126 //CODE HERE
127 }
128
129
130 /// Check "FP enabled" machine status bit. Called when executing any FP
131 /// instruction in full-system mode.
132 /// @retval Full-system mode: NoFault if FP is enabled, FenFault
133 /// if not. Non-full-system mode: always returns NoFault.
134#if FULL_SYSTEM
135 inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc)
136 {
137 Fault fault = NoFault; // dummy... this ipr access should not fault
138 if (!Mips34k::ICSR_FPE(xc->readIpr(MipsISA::IPR_ICSR, fault))) {
139 fault = FloatEnableFault;
140 }
141 return fault;
142 }
143#else
144 inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc)
145 {
146 return NoFault;
147 }
148#endif
149
150
151
127}};
128
129
152}};
153
154