unimp.isa (2665:a124942bacb8) | unimp.isa (2686:f0d591379ac3) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2003-2005 The Regents of The University of Michigan 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2003-2005 The Regents of The University of Michigan 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
28// 29// Authors: Korey Sewell | |
30 | 28 |
31//////////////////////////////////////////////////////////////////// 32// 33// Unimplemented instructions 34// 35 | |
36output header {{ 37 /** 38 * Static instruction class for unimplemented instructions that 39 * cause simulator termination. Note that these are recognized 40 * (legal) instructions that the simulator does not support; the 41 * 'Unknown' class is used for unrecognized/illegal instructions. 42 * This is a leaf class. 43 */ --- 54 unchanged lines hidden (view full) --- 98 { 99 return csprintf("%-10s (unimplemented)", mnemonic); 100 } 101 102 std::string 103 WarnUnimplemented::generateDisassembly(Addr pc, 104 const SymbolTable *symtab) const 105 { | 29output header {{ 30 /** 31 * Static instruction class for unimplemented instructions that 32 * cause simulator termination. Note that these are recognized 33 * (legal) instructions that the simulator does not support; the 34 * 'Unknown' class is used for unrecognized/illegal instructions. 35 * This is a leaf class. 36 */ --- 54 unchanged lines hidden (view full) --- 91 { 92 return csprintf("%-10s (unimplemented)", mnemonic); 93 } 94 95 std::string 96 WarnUnimplemented::generateDisassembly(Addr pc, 97 const SymbolTable *symtab) const 98 { |
106#ifdef SS_COMPATIBLE_DISASSEMBLY 107 return csprintf("%-10s", mnemonic); 108#else | |
109 return csprintf("%-10s (unimplemented)", mnemonic); | 99 return csprintf("%-10s (unimplemented)", mnemonic); |
110#endif | |
111 } 112}}; 113 114output exec {{ 115 Fault 116 FailUnimplemented::execute(%(CPU_exec_context)s *xc, 117 Trace::InstRecord *traceData) const 118 { 119 panic("attempt to execute unimplemented instruction '%s' " 120 "(inst 0x%08x, opcode 0x%x, binary:%s)", mnemonic, machInst, OPCODE, 121 inst2string(machInst)); 122 return new UnimplementedOpcodeFault; 123 } 124 125 Fault 126 WarnUnimplemented::execute(%(CPU_exec_context)s *xc, 127 Trace::InstRecord *traceData) const 128 { 129 if (!warned) { | 100 } 101}}; 102 103output exec {{ 104 Fault 105 FailUnimplemented::execute(%(CPU_exec_context)s *xc, 106 Trace::InstRecord *traceData) const 107 { 108 panic("attempt to execute unimplemented instruction '%s' " 109 "(inst 0x%08x, opcode 0x%x, binary:%s)", mnemonic, machInst, OPCODE, 110 inst2string(machInst)); 111 return new UnimplementedOpcodeFault; 112 } 113 114 Fault 115 WarnUnimplemented::execute(%(CPU_exec_context)s *xc, 116 Trace::InstRecord *traceData) const 117 { 118 if (!warned) { |
130 warn("instruction '%s' unimplemented\n", mnemonic); | 119 warn("\tinstruction '%s' unimplemented\n", mnemonic); |
131 warned = true; 132 } 133 134 return NoFault; 135 } 136}}; 137 138 139def format FailUnimpl() {{ 140 iop = InstObjParams(name, 'FailUnimplemented') 141 decode_block = BasicDecodeWithMnemonic.subst(iop) 142}}; 143 144def format WarnUnimpl() {{ 145 iop = InstObjParams(name, 'WarnUnimplemented') 146 decode_block = BasicDecodeWithMnemonic.subst(iop) 147}}; 148 | 120 warned = true; 121 } 122 123 return NoFault; 124 } 125}}; 126 127 128def format FailUnimpl() {{ 129 iop = InstObjParams(name, 'FailUnimplemented') 130 decode_block = BasicDecodeWithMnemonic.subst(iop) 131}}; 132 133def format WarnUnimpl() {{ 134 iop = InstObjParams(name, 'WarnUnimplemented') 135 decode_block = BasicDecodeWithMnemonic.subst(iop) 136}}; 137 |
149output header {{ 150 /** 151 * Static instruction class for unknown (illegal) instructions. 152 * These cause simulator termination if they are executed in a 153 * non-speculative mode. This is a leaf class. 154 */ 155 class Unknown : public MipsStaticInst 156 { 157 public: 158 /// Constructor 159 Unknown(MachInst _machInst) 160 : MipsStaticInst("unknown", _machInst, No_OpClass) 161 { 162 // don't call execute() (which panics) if we're on a 163 // speculative path 164 flags[IsNonSpeculative] = true; 165 } 166 167 %(BasicExecDeclare)s 168 169 std::string 170 generateDisassembly(Addr pc, const SymbolTable *symtab) const; 171 }; 172}}; 173 | |