1// -*- mode:c++ -*-
2
3// Copyright .AN) 2007 MIPS Technologies, Inc. All Rights Reserved
4
5// This software is part of the M5 simulator.
6
7// THIS IS A LEGAL AGREEMENT. BY DOWNLOADING, USING, COPYING, CREATING
8// DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING
9// TO THESE TERMS AND CONDITIONS.
10
11// Permission is granted to use, copy, create derivative works and
12// distribute this software and such derivative works for any purpose,
13// so long as (1) the copyright notice above, this grant of permission,
14// and the disclaimer below appear in all copies and derivative works
15// made, (2) the copyright notice above is augmented as appropriate to
16// reflect the addition of any new copyrightable work in a derivative
17// work (e.g., Copyright .AN) <Publication Year> Copyright Owner), and (3)
18// the name of MIPS Technologies, Inc. ($B!H(BMIPS$B!I(B) is not used in any
19// advertising or publicity pertaining to the use or distribution of
20// this software without specific, written prior authorization.
21
22// THIS SOFTWARE IS PROVIDED $B!H(BAS IS.$B!I(B MIPS MAKES NO WARRANTIES AND
23// DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR
24// OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
26// NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE.
27// IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT,
28// INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF
29// ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT,
30// THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY
31// IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR
32// STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE
33// POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE.
34
35//Authors: Korey L. Sewell
36
37////////////////////////////////////////////////////////////////////
38//
39// TlbOp instructions
40//
41
42output header {{
43 /**
44 * Base class for integer operations.
45 */
46 class TlbOp : public MipsStaticInst
47 {
48 protected:
49
50 /// Constructor
51 TlbOp(const char *mnem, MachInst _machInst, OpClass __opClass) : MipsStaticInst(mnem, _machInst, __opClass)
52 {
53 }
54
55 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
56 };
57}};
58
59output decoder {{
60 std::string TlbOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
61 {
62 return "Disassembly of integer instruction\n";
63 }
64}};
65
66def template TlbOpExecute {{
67 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
68 {
69 //Write the resulting state to the execution context
70 %(op_wb)s;
71
72 //Call into the trap handler with the appropriate fault
73 return No_Fault;
74 }
75}};
76
77// Primary format for integer operate instructions:
78def format TlbOp(code, *opt_flags) {{
79 orig_code = code
80 cblk = code
81 iop = InstObjParams(name, Name, 'MipsStaticInst', cblk, opt_flags)
82 header_output = BasicDeclare.subst(iop)
83 decoder_output = BasicConstructor.subst(iop)
84 decode_block = BasicDecodeWithMnemonic.subst(iop)
85 exec_output = TlbOpExecute.subst(iop)
86}};