mt.isa (6383:31c067ae3331) mt.isa (7823:dac01f14f20f)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 MIPS Technologies, Inc.
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

--- 187 unchanged lines hidden (view full) ---

196 header_output = BasicDeclare.subst(iop)
197 decoder_output = BasicConstructor.subst(iop)
198 decode_block = BasicDecode.subst(iop)
199 exec_output = MTExecute.subst(iop)
200}};
201
202def format MT_MFTR(code, *flags) {{
203 flags += ('IsNonSpeculative', )
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 MIPS Technologies, Inc.
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

--- 187 unchanged lines hidden (view full) ---

196 header_output = BasicDeclare.subst(iop)
197 decoder_output = BasicConstructor.subst(iop)
198 decode_block = BasicDecode.subst(iop)
199 exec_output = MTExecute.subst(iop)
200}};
201
202def format MT_MFTR(code, *flags) {{
203 flags += ('IsNonSpeculative', )
204# code = 'std::cerr << curTick << \": T\" << xc->tcBase()->threadId() << \": Executing MT INST: ' + name + '\" << endl;\n' + code
204# code = 'std::cerr << curTick() << \": T\" << xc->tcBase()->threadId() << \": Executing MT INST: ' + name + '\" << endl;\n' + code
205
206 code += 'if (MT_H == 1) {\n'
207 code += 'data = bits(data, top_bit, bottom_bit);\n'
208 code += '}\n'
209 code += 'Rd = data;\n'
210
211 iop = InstObjParams(name, Name, 'MTOp', code, flags)
212 header_output = BasicDeclare.subst(iop)
213 decoder_output = BasicConstructor.subst(iop)
214 decode_block = BasicDecode.subst(iop)
215 exec_output = ThreadRegisterExecute.subst(iop)
216}};
217
218def format MT_MTTR(code, *flags) {{
219 flags += ('IsNonSpeculative', )
205
206 code += 'if (MT_H == 1) {\n'
207 code += 'data = bits(data, top_bit, bottom_bit);\n'
208 code += '}\n'
209 code += 'Rd = data;\n'
210
211 iop = InstObjParams(name, Name, 'MTOp', code, flags)
212 header_output = BasicDeclare.subst(iop)
213 decoder_output = BasicConstructor.subst(iop)
214 decode_block = BasicDecode.subst(iop)
215 exec_output = ThreadRegisterExecute.subst(iop)
216}};
217
218def format MT_MTTR(code, *flags) {{
219 flags += ('IsNonSpeculative', )
220# code = 'std::cerr << curTick << \": T\" << xc->tcBase()->threadId() << \": Executing MT INST: ' + name + '\" << endl;\n' + code
220# code = 'std::cerr << curTick() << \": T\" << xc->tcBase()->threadId() << \": Executing MT INST: ' + name + '\" << endl;\n' + code
221 iop = InstObjParams(name, Name, 'MTOp', code, flags)
222 header_output = BasicDeclare.subst(iop)
223 decoder_output = BasicConstructor.subst(iop)
224 decode_block = BasicDecode.subst(iop)
225 exec_output = ThreadRegisterExecute.subst(iop)
226}};
221 iop = InstObjParams(name, Name, 'MTOp', code, flags)
222 header_output = BasicDeclare.subst(iop)
223 decoder_output = BasicConstructor.subst(iop)
224 decode_block = BasicDecode.subst(iop)
225 exec_output = ThreadRegisterExecute.subst(iop)
226}};