mt.isa (5715:e8c1d4e669a7) mt.isa (6376:eaf61ef6a8f2)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 MIPS Technologies, Inc.
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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80 ccprintf(ss, "%-10s r%d, r%d", mnemonic, RT, RD);
81 }
82
83 return ss.str();
84 }
85}};
86
87output exec {{
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 MIPS Technologies, Inc.
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

--- 71 unchanged lines hidden (view full) ---

80 ccprintf(ss, "%-10s r%d, r%d", mnemonic, RT, RD);
81 }
82
83 return ss.str();
84 }
85}};
86
87output exec {{
88 void getThrRegExValues(%(CPU_exec_context)s *xc, unsigned &vpe_conf0, unsigned &tc_bind_mt, unsigned &tc_bind, unsigned &vpe_control, unsigned &mvp_conf0)
88 void getThrRegExValues(%(CPU_exec_context)s *xc,
89 VPEConf0Reg &vpe_conf0, TCBindReg &tc_bind_mt,
90 TCBindReg &tc_bind, VPEControlReg &vpe_control,
91 MVPConf0Reg &mvp_conf0)
89 {
90 vpe_conf0 = xc->readMiscReg(VPEConf0);
91 tc_bind_mt = xc->readRegOtherThread(TCBind + Ctrl_Base_DepTag);
92 tc_bind = xc->readMiscReg(TCBind);
93 vpe_control = xc->readMiscReg(VPEControl);
94 mvp_conf0 = xc->readMiscReg(MVPConf0);
95 }
96
92 {
93 vpe_conf0 = xc->readMiscReg(VPEConf0);
94 tc_bind_mt = xc->readRegOtherThread(TCBind + Ctrl_Base_DepTag);
95 tc_bind = xc->readMiscReg(TCBind);
96 vpe_control = xc->readMiscReg(VPEControl);
97 mvp_conf0 = xc->readMiscReg(MVPConf0);
98 }
99
97 void getMTExValues(%(CPU_exec_context)s *xc, unsigned &config3)
100 void getMTExValues(%(CPU_exec_context)s *xc, Config3Reg &config3)
98 {
99 config3 = xc->readMiscReg(Config3);
100 }
101}};
102
103def template ThreadRegisterExecute {{
104 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
105 {
106 Fault fault = NoFault;
107 int64_t data;
108 %(op_decl)s;
109 %(op_rd)s;
110
101 {
102 config3 = xc->readMiscReg(Config3);
103 }
104}};
105
106def template ThreadRegisterExecute {{
107 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
108 {
109 Fault fault = NoFault;
110 int64_t data;
111 %(op_decl)s;
112 %(op_rd)s;
113
111 unsigned vpe_conf0, tc_bind_mt, tc_bind, vpe_control, mvp_conf0;
114 VPEConf0Reg vpeConf0;
115 TCBindReg tcBindMT;
116 TCBindReg tcBind;
117 VPEControlReg vpeControl;
118 MVPConf0Reg mvpConf0;
112
119
113 getThrRegExValues(xc, vpe_conf0, tc_bind_mt, tc_bind, vpe_control, mvp_conf0);
120 getThrRegExValues(xc, vpeConf0, tcBindMT,
121 tcBind, vpeControl, mvpConf0);
114
115 if (isCoprocessorEnabled(xc, 0)) {
122
123 if (isCoprocessorEnabled(xc, 0)) {
116 if (bits(vpe_conf0, VPEC0_MVP) == 0 &&
117 bits(tc_bind_mt, TCB_CUR_VPE_HI, TCB_CUR_VPE_LO) !=
118 bits(tc_bind, TCB_CUR_VPE_HI, TCB_CUR_VPE_LO)) {
124 if (vpeConf0.mvp == 0 && tcBindMT.curVPE != tcBind.curVPE) {
119 data = -1;
125 data = -1;
120 } else if (bits(vpe_control, VPEC_TARG_TC_HI, VPEC_TARG_TC_LO) >
121 bits(mvp_conf0, MVPC0_PTC_HI, MVPC0_PTC_LO)) {
126 } else if (vpeControl.targTC > mvpConf0.ptc) {
122 data = -1;
123 } else {
124 int top_bit = 0;
125 int bottom_bit = 0;
126
127 if (MT_H == 1) {
128 top_bit = 63;
129 bottom_bit = 32;

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149
150def template MTExecute{{
151 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
152 {
153 Fault fault = NoFault;
154 %(op_decl)s;
155 %(op_rd)s;
156
127 data = -1;
128 } else {
129 int top_bit = 0;
130 int bottom_bit = 0;
131
132 if (MT_H == 1) {
133 top_bit = 63;
134 bottom_bit = 32;

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154
155def template MTExecute{{
156 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
157 {
158 Fault fault = NoFault;
159 %(op_decl)s;
160 %(op_rd)s;
161
157 unsigned config3;
162 Config3Reg config3;
158
159 getMTExValues(xc, config3);
160
161 if (isCoprocessorEnabled(xc, 0)) {
163
164 getMTExValues(xc, config3);
165
166 if (isCoprocessorEnabled(xc, 0)) {
162 if (bits(config3, CFG3_MT) == 1) {
167 if (config3.mt == 1) {
163 %(code)s;
164 } else {
165 fault = new ReservedInstructionFault();
166 }
167 } else {
168 fault = new CoprocessorUnusableFault(0);
169 }
170

--- 51 unchanged lines hidden --- 		168 %(code)s;
169 } else {
170 fault = new ReservedInstructionFault();
171 }
172 } else {
173 fault = new CoprocessorUnusableFault(0);
174 }
175

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