mt.isa (12104:edd63f9c6184) mt.isa (12234:78ece221f9f5)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 MIPS Technologies, Inc.
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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80 ccprintf(ss, "%-10s r%d, r%d", mnemonic, RT, RD);
81 }
82
83 return ss.str();
84 }
85}};
86
87output header {{
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 MIPS Technologies, Inc.
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

--- 71 unchanged lines hidden (view full) ---

80 ccprintf(ss, "%-10s r%d, r%d", mnemonic, RT, RD);
81 }
82
83 return ss.str();
84 }
85}};
86
87output header {{
88 void getThrRegExValues(%(CPU_exec_context)s *xc,
88 void getThrRegExValues(ExecContext *xc,
89 MipsISA::VPEConf0Reg &vpe_conf0,
90 MipsISA::TCBindReg &tc_bind_mt,
91 MipsISA::TCBindReg &tc_bind,
92 MipsISA::VPEControlReg &vpe_control,
93 MipsISA::MVPConf0Reg &mvp_conf0);
94
89 MipsISA::VPEConf0Reg &vpe_conf0,
90 MipsISA::TCBindReg &tc_bind_mt,
91 MipsISA::TCBindReg &tc_bind,
92 MipsISA::VPEControlReg &vpe_control,
93 MipsISA::MVPConf0Reg &mvp_conf0);
94
95 void getMTExValues(%(CPU_exec_context)s *xc, MipsISA::Config3Reg &config3);
95 void getMTExValues(ExecContext *xc, MipsISA::Config3Reg &config3);
96}};
97
98output exec {{
96}};
97
98output exec {{
99 void getThrRegExValues(CPU_EXEC_CONTEXT *xc,
99 void getThrRegExValues(ExecContext *xc,
100 VPEConf0Reg &vpe_conf0, TCBindReg &tc_bind_mt,
101 TCBindReg &tc_bind, VPEControlReg &vpe_control,
102 MVPConf0Reg &mvp_conf0)
103 {
104 vpe_conf0 = xc->readMiscReg(MISCREG_VPE_CONF0);
105 tc_bind_mt = xc->readRegOtherThread(RegId(MiscRegClass,
106 MISCREG_TC_BIND));
107 tc_bind = xc->readMiscReg(MISCREG_TC_BIND);
108 vpe_control = xc->readMiscReg(MISCREG_VPE_CONTROL);
109 mvp_conf0 = xc->readMiscReg(MISCREG_MVP_CONF0);
110 }
111
100 VPEConf0Reg &vpe_conf0, TCBindReg &tc_bind_mt,
101 TCBindReg &tc_bind, VPEControlReg &vpe_control,
102 MVPConf0Reg &mvp_conf0)
103 {
104 vpe_conf0 = xc->readMiscReg(MISCREG_VPE_CONF0);
105 tc_bind_mt = xc->readRegOtherThread(RegId(MiscRegClass,
106 MISCREG_TC_BIND));
107 tc_bind = xc->readMiscReg(MISCREG_TC_BIND);
108 vpe_control = xc->readMiscReg(MISCREG_VPE_CONTROL);
109 mvp_conf0 = xc->readMiscReg(MISCREG_MVP_CONF0);
110 }
111
112 void getMTExValues(CPU_EXEC_CONTEXT *xc, Config3Reg &config3)
112 void getMTExValues(ExecContext *xc, Config3Reg &config3)
113 {
114 config3 = xc->readMiscReg(MISCREG_CONFIG3);
115 }
116}};
117
118def template ThreadRegisterExecute {{
113 {
114 config3 = xc->readMiscReg(MISCREG_CONFIG3);
115 }
116}};
117
118def template ThreadRegisterExecute {{
119 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
119 Fault %(class_name)s::execute(
120 ExecContext *xc, Trace::InstRecord *traceData) const
120 {
121 Fault fault = NoFault;
122 int64_t data M5_VAR_USED;
123 %(op_decl)s;
124 %(op_rd)s;
125
126 VPEConf0Reg vpeConf0;
127 TCBindReg tcBindMT;

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149 %(op_wb)s;
150 }
151
152 return fault;
153 }
154}};
155
156def template MTExecute{{
121 {
122 Fault fault = NoFault;
123 int64_t data M5_VAR_USED;
124 %(op_decl)s;
125 %(op_rd)s;
126
127 VPEConf0Reg vpeConf0;
128 TCBindReg tcBindMT;

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150 %(op_wb)s;
151 }
152
153 return fault;
154 }
155}};
156
157def template MTExecute{{
157 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
158 Fault %(class_name)s::execute(
159 ExecContext *xc, Trace::InstRecord *traceData) const
158 {
159 Fault fault = NoFault;
160 %(op_decl)s;
161 %(op_rd)s;
162
163 Config3Reg config3;
164
165 getMTExValues(xc, config3);

--- 63 unchanged lines hidden --- 		160 {
161 Fault fault = NoFault;
162 %(op_decl)s;
163 %(op_rd)s;
164
165 Config3Reg config3;
166
167 getMTExValues(xc, config3);

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