1// -*- mode:c++ -*- 2 3// Copyright (c) 2007 MIPS Technologies, Inc. 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 82 unchanged lines hidden (view full) --- 91 MipsISA::TCBindReg &tc_bind, 92 MipsISA::VPEControlReg &vpe_control, 93 MipsISA::MVPConf0Reg &mvp_conf0); 94 95 void getMTExValues(%(CPU_exec_context)s *xc, MipsISA::Config3Reg &config3); 96}}; 97 98output exec {{ |
99 void getThrRegExValues(CPU_EXEC_CONTEXT *xc, |
100 VPEConf0Reg &vpe_conf0, TCBindReg &tc_bind_mt, 101 TCBindReg &tc_bind, VPEControlReg &vpe_control, 102 MVPConf0Reg &mvp_conf0) 103 { 104 vpe_conf0 = xc->readMiscReg(MISCREG_VPE_CONF0); 105 tc_bind_mt = xc->readRegOtherThread(MISCREG_TC_BIND + Misc_Reg_Base); 106 tc_bind = xc->readMiscReg(MISCREG_TC_BIND); 107 vpe_control = xc->readMiscReg(MISCREG_VPE_CONTROL); 108 mvp_conf0 = xc->readMiscReg(MISCREG_MVP_CONF0); 109 } 110 |
111 void getMTExValues(CPU_EXEC_CONTEXT *xc, Config3Reg &config3) |
112 { 113 config3 = xc->readMiscReg(MISCREG_CONFIG3); 114 } 115}}; 116 117def template ThreadRegisterExecute {{ |
118 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const |
119 { 120 Fault fault = NoFault; 121 int64_t data M5_VAR_USED; 122 %(op_decl)s; 123 %(op_rd)s; 124 125 VPEConf0Reg vpeConf0; 126 TCBindReg tcBindMT; --- 21 unchanged lines hidden (view full) --- 148 %(op_wb)s; 149 } 150 151 return fault; 152 } 153}}; 154 155def template MTExecute{{ |
156 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const |
157 { 158 Fault fault = NoFault; 159 %(op_decl)s; 160 %(op_rd)s; 161 162 Config3Reg config3; 163 164 getMTExValues(xc, config3); --- 63 unchanged lines hidden --- |