| mem.isa (8442:b1f3dfae06f1) | mem.isa (8564:f81bcb16fa1b) |
|---|---|
| 1// -*- mode:c++ -*- 2 3// Copyright (c) 2007 MIPS Technologies, Inc. 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 528 unchanged lines hidden (view full) --- 537 (header_output, decoder_output, decode_block, exec_output) = \ 538 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 539 exec_template_base = 'Store') 540}}; 541 542 543def format LoadUnalignedMemory(memacc_code, ea_code = {{ EA = (Rs + disp) & ~3; }}, 544 mem_flags = [], inst_flags = []) {{ | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2007 MIPS Technologies, Inc. 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 528 unchanged lines hidden (view full) --- 537 (header_output, decoder_output, decode_block, exec_output) = \ 538 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 539 exec_template_base = 'Store') 540}}; 541 542 543def format LoadUnalignedMemory(memacc_code, ea_code = {{ EA = (Rs + disp) & ~3; }}, 544 mem_flags = [], inst_flags = []) {{ |
| 545 decl_code = 'uint32_t mem_word = Mem.uw;\n' 546 decl_code += 'uint32_t unalign_addr = Rs + disp;\n' 547 decl_code += 'uint32_t byte_offset = unalign_addr & 3;\n' 548 decl_code += '#if BYTE_ORDER == BIG_ENDIAN\n' 549 decl_code += '\tbyte_offset ^= 3;\n' 550 decl_code += '#endif\n' | 545 decl_code = ''' 546 uint32_t mem_word = Mem.uw; 547 uint32_t unalign_addr = Rs + disp; 548 uint32_t byte_offset = unalign_addr & 3; 549 if (GuestByteOrder == BigEndianByteOrder) 550 byte_offset ^= 3; 551 ''' |
| 551 552 memacc_code = decl_code + memacc_code 553 554 (header_output, decoder_output, decode_block, exec_output) = \ 555 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 556 decode_template = ImmNopCheckDecode, 557 exec_template_base = 'Load') 558}}; 559 560def format StoreUnalignedMemory(memacc_code, ea_code = {{ EA = (Rs + disp) & ~3; }}, 561 mem_flags = [], inst_flags = []) {{ 562 decl_code = ''' 563 uint32_t mem_word = 0; 564 uint32_t unaligned_addr = Rs + disp; 565 uint32_t byte_offset = unaligned_addr & 3; | 552 553 memacc_code = decl_code + memacc_code 554 555 (header_output, decoder_output, decode_block, exec_output) = \ 556 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 557 decode_template = ImmNopCheckDecode, 558 exec_template_base = 'Load') 559}}; 560 561def format StoreUnalignedMemory(memacc_code, ea_code = {{ EA = (Rs + disp) & ~3; }}, 562 mem_flags = [], inst_flags = []) {{ 563 decl_code = ''' 564 uint32_t mem_word = 0; 565 uint32_t unaligned_addr = Rs + disp; 566 uint32_t byte_offset = unaligned_addr & 3; |
| 566 #if BYTE_ORDER == BIG_ENDIAN | 567 if (GuestByteOrder == BigEndianByteOrder) |
| 567 byte_offset ^= 3; | 568 byte_offset ^= 3; |
| 568 #endif | |
| 569 fault = readMemAtomic(xc, traceData, EA, mem_word, memAccessFlags); 570 ''' 571 memacc_code = decl_code + memacc_code + '\nMem = mem_word;\n' 572 573 (header_output, decoder_output, decode_block, exec_output) = \ 574 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 575 exec_template_base = 'Store') 576}}; --- 20 unchanged lines hidden --- | 569 fault = readMemAtomic(xc, traceData, EA, mem_word, memAccessFlags); 570 ''' 571 memacc_code = decl_code + memacc_code + '\nMem = mem_word;\n' 572 573 (header_output, decoder_output, decode_block, exec_output) = \ 574 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 575 exec_template_base = 'Store') 576}}; --- 20 unchanged lines hidden --- |