mem.isa (11303:f694764d656d) mem.isa (12234:78ece221f9f5)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 MIPS Technologies, Inc.
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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92 flags[IsFloating] ? 'f' : 'r',
93 flags[IsFloating] ? FD : RD,
94 RS, RT);
95 }
96
97}};
98
99output header {{
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 MIPS Technologies, Inc.
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

--- 83 unchanged lines hidden (view full) ---

92 flags[IsFloating] ? 'f' : 'r',
93 flags[IsFloating] ? FD : RD,
94 RS, RT);
95 }
96
97}};
98
99output header {{
100 uint64_t getMemData(%(CPU_exec_context)s *xc, Packet *packet);
100 uint64_t getMemData(ExecContext *xc, Packet *packet);
101
102}};
103
104output exec {{
105 /** return data in cases where there the size of data is only
106 known in the packet
107 */
101
102}};
103
104output exec {{
105 /** return data in cases where there the size of data is only
106 known in the packet
107 */
108 uint64_t getMemData(CPU_EXEC_CONTEXT *xc, Packet *packet) {
108 uint64_t getMemData(ExecContext *xc, Packet *packet) {
109 switch (packet->getSize())
110 {
111 case 1:
112 return packet->get<uint8_t>();
113
114 case 2:
115 return packet->get<uint16_t>();
116

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148
149 %(InitiateAccDeclare)s
150
151 %(CompleteAccDeclare)s
152 };
153}};
154
155def template EACompDeclare {{
109 switch (packet->getSize())
110 {
111 case 1:
112 return packet->get<uint8_t>();
113
114 case 2:
115 return packet->get<uint16_t>();
116

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148
149 %(InitiateAccDeclare)s
150
151 %(CompleteAccDeclare)s
152 };
153}};
154
155def template EACompDeclare {{
156 Fault eaComp(%(CPU_exec_context)s *, Trace::InstRecord *) const;
156 Fault eaComp(ExecContext *, Trace::InstRecord *) const;
157}};
158
159def template InitiateAccDeclare {{
157}};
158
159def template InitiateAccDeclare {{
160 Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
160 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
161}};
162
163
164def template CompleteAccDeclare {{
161}};
162
163
164def template CompleteAccDeclare {{
165 Fault completeAcc(Packet *, %(CPU_exec_context)s *, Trace::InstRecord *) const;
165 Fault completeAcc(Packet *, ExecContext *, Trace::InstRecord *) const;
166}};
167
168def template LoadStoreConstructor {{
169 %(class_name)s::%(class_name)s(ExtMachInst machInst)
170 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
171 {
172 %(constructor)s;
173 }
174}};
175
176
177def template EACompExecute {{
178 Fault
166}};
167
168def template LoadStoreConstructor {{
169 %(class_name)s::%(class_name)s(ExtMachInst machInst)
170 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
171 {
172 %(constructor)s;
173 }
174}};
175
176
177def template EACompExecute {{
178 Fault
179 %(class_name)s::eaComp(CPU_EXEC_CONTEXT *xc,
180 Trace::InstRecord *traceData) const
179 %(class_name)s::eaComp(ExecContext *xc, Trace::InstRecord *traceData) const
181 {
182 Addr EA;
183 Fault fault = NoFault;
184
185 if (this->isFloating()) {
186 %(fp_enable_check)s;
187
188 if(fault != NoFault)

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198 xc->setEA(EA);
199 }
200
201 return fault;
202 }
203}};
204
205def template LoadExecute {{
180 {
181 Addr EA;
182 Fault fault = NoFault;
183
184 if (this->isFloating()) {
185 %(fp_enable_check)s;
186
187 if(fault != NoFault)

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197 xc->setEA(EA);
198 }
199
200 return fault;
201 }
202}};
203
204def template LoadExecute {{
206 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
205 Fault %(class_name)s::execute(ExecContext *xc,
207 Trace::InstRecord *traceData) const
208 {
209 Addr EA;
210 Fault fault = NoFault;
211
212 if (this->isFloating()) {
213 %(fp_enable_check)s;
214

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230 }
231
232 return fault;
233 }
234}};
235
236
237def template LoadInitiateAcc {{
206 Trace::InstRecord *traceData) const
207 {
208 Addr EA;
209 Fault fault = NoFault;
210
211 if (this->isFloating()) {
212 %(fp_enable_check)s;
213

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229 }
230
231 return fault;
232 }
233}};
234
235
236def template LoadInitiateAcc {{
238 Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc,
237 Fault %(class_name)s::initiateAcc(ExecContext *xc,
239 Trace::InstRecord *traceData) const
240 {
241 Addr EA;
242 Fault fault = NoFault;
243
244 if (this->isFloating()) {
245 %(fp_enable_check)s;
246

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256 fault = initiateMemRead(xc, traceData, EA, Mem, memAccessFlags);
257 }
258
259 return fault;
260 }
261}};
262
263def template LoadCompleteAcc {{
238 Trace::InstRecord *traceData) const
239 {
240 Addr EA;
241 Fault fault = NoFault;
242
243 if (this->isFloating()) {
244 %(fp_enable_check)s;
245

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255 fault = initiateMemRead(xc, traceData, EA, Mem, memAccessFlags);
256 }
257
258 return fault;
259 }
260}};
261
262def template LoadCompleteAcc {{
264 Fault %(class_name)s::completeAcc(Packet *pkt,
265 CPU_EXEC_CONTEXT *xc,
263 Fault %(class_name)s::completeAcc(Packet *pkt, ExecContext *xc,
266 Trace::InstRecord *traceData) const
267 {
268 Fault fault = NoFault;
269
270 if (this->isFloating()) {
271 %(fp_enable_check)s;
272
273 if(fault != NoFault)

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287 %(op_wb)s;
288 }
289
290 return fault;
291 }
292}};
293
294def template StoreExecute {{
264 Trace::InstRecord *traceData) const
265 {
266 Fault fault = NoFault;
267
268 if (this->isFloating()) {
269 %(fp_enable_check)s;
270
271 if(fault != NoFault)

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285 %(op_wb)s;
286 }
287
288 return fault;
289 }
290}};
291
292def template StoreExecute {{
295 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
293 Fault %(class_name)s::execute(ExecContext *xc,
296 Trace::InstRecord *traceData) const
297 {
298 Addr EA;
299 Fault fault = NoFault;
300
301 %(fp_enable_check)s;
302 %(op_decl)s;
303 %(op_rd)s;

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321 }
322
323 return fault;
324 }
325}};
326
327
328def template StoreFPExecute {{
294 Trace::InstRecord *traceData) const
295 {
296 Addr EA;
297 Fault fault = NoFault;
298
299 %(fp_enable_check)s;
300 %(op_decl)s;
301 %(op_rd)s;

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319 }
320
321 return fault;
322 }
323}};
324
325
326def template StoreFPExecute {{
329 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
327 Fault %(class_name)s::execute(ExecContext *xc,
330 Trace::InstRecord *traceData) const
331 {
332 Addr EA;
333 Fault fault = NoFault;
334
335 %(fp_enable_check)s;
336 if(fault != NoFault)
337 return fault;

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356 %(op_wb)s;
357 }
358
359 return fault;
360 }
361}};
362
363def template StoreCondExecute {{
328 Trace::InstRecord *traceData) const
329 {
330 Addr EA;
331 Fault fault = NoFault;
332
333 %(fp_enable_check)s;
334 if(fault != NoFault)
335 return fault;

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354 %(op_wb)s;
355 }
356
357 return fault;
358 }
359}};
360
361def template StoreCondExecute {{
364 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
362 Fault %(class_name)s::execute(ExecContext *xc,
365 Trace::InstRecord *traceData) const
366 {
367 Addr EA;
368 Fault fault = NoFault;
369 uint64_t write_result = 0;
370
371 %(fp_enable_check)s;
372 %(op_decl)s;

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390 %(op_wb)s;
391 }
392
393 return fault;
394 }
395}};
396
397def template StoreInitiateAcc {{
363 Trace::InstRecord *traceData) const
364 {
365 Addr EA;
366 Fault fault = NoFault;
367 uint64_t write_result = 0;
368
369 %(fp_enable_check)s;
370 %(op_decl)s;

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388 %(op_wb)s;
389 }
390
391 return fault;
392 }
393}};
394
395def template StoreInitiateAcc {{
398 Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc,
396 Fault %(class_name)s::initiateAcc(ExecContext *xc,
399 Trace::InstRecord *traceData) const
400 {
401 Addr EA;
402 Fault fault = NoFault;
403
404 %(fp_enable_check)s;
405 %(op_decl)s;
406 %(op_rd)s;

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417
418 return fault;
419 }
420}};
421
422
423def template StoreCompleteAcc {{
424 Fault %(class_name)s::completeAcc(Packet *pkt,
397 Trace::InstRecord *traceData) const
398 {
399 Addr EA;
400 Fault fault = NoFault;
401
402 %(fp_enable_check)s;
403 %(op_decl)s;
404 %(op_rd)s;

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415
416 return fault;
417 }
418}};
419
420
421def template StoreCompleteAcc {{
422 Fault %(class_name)s::completeAcc(Packet *pkt,
425 CPU_EXEC_CONTEXT *xc,
423 ExecContext *xc,
426 Trace::InstRecord *traceData) const
427 {
428 return NoFault;
429 }
430}};
431
432def template StoreCondCompleteAcc {{
433 Fault %(class_name)s::completeAcc(Packet *pkt,
424 Trace::InstRecord *traceData) const
425 {
426 return NoFault;
427 }
428}};
429
430def template StoreCondCompleteAcc {{
431 Fault %(class_name)s::completeAcc(Packet *pkt,
434 CPU_EXEC_CONTEXT *xc,
432 ExecContext *xc,
435 Trace::InstRecord *traceData) const
436 {
437 Fault fault = NoFault;
438
439 %(fp_enable_check)s;
440 %(op_dest_decl)s;
441
442 uint64_t write_result = pkt->req->getExtraData();

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449 %(op_wb)s;
450 }
451
452 return fault;
453 }
454}};
455
456def template MiscExecute {{
433 Trace::InstRecord *traceData) const
434 {
435 Fault fault = NoFault;
436
437 %(fp_enable_check)s;
438 %(op_dest_decl)s;
439
440 uint64_t write_result = pkt->req->getExtraData();

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447 %(op_wb)s;
448 }
449
450 return fault;
451 }
452}};
453
454def template MiscExecute {{
457 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
455 Fault %(class_name)s::execute(ExecContext *xc,
458 Trace::InstRecord *traceData) const
459 {
460 Addr EA M5_VAR_USED = 0;
461 Fault fault = NoFault;
462
463 %(fp_enable_check)s;
464 %(op_decl)s;
465 %(op_rd)s;
466 %(ea_code)s;
467
468 if (fault == NoFault) {
469 %(memacc_code)s;
470 }
471
472 return NoFault;
473 }
474}};
475
476def template MiscInitiateAcc {{
456 Trace::InstRecord *traceData) const
457 {
458 Addr EA M5_VAR_USED = 0;
459 Fault fault = NoFault;
460
461 %(fp_enable_check)s;
462 %(op_decl)s;
463 %(op_rd)s;
464 %(ea_code)s;
465
466 if (fault == NoFault) {
467 %(memacc_code)s;
468 }
469
470 return NoFault;
471 }
472}};
473
474def template MiscInitiateAcc {{
477 Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc,
475 Fault %(class_name)s::initiateAcc(ExecContext *xc,
478 Trace::InstRecord *traceData) const
479 {
480 panic("Misc instruction does not support split access method!");
481 return NoFault;
482 }
483}};
484
485
486def template MiscCompleteAcc {{
476 Trace::InstRecord *traceData) const
477 {
478 panic("Misc instruction does not support split access method!");
479 return NoFault;
480 }
481}};
482
483
484def template MiscCompleteAcc {{
487 Fault %(class_name)s::completeAcc(Packet *pkt,
488 CPU_EXEC_CONTEXT *xc,
485 Fault %(class_name)s::completeAcc(Packet *pkt, ExecContext *xc,
489 Trace::InstRecord *traceData) const
490 {
491 panic("Misc instruction does not support split access method!");
492
493 return NoFault;
494 }
495}};
496

--- 105 unchanged lines hidden --- 		486 Trace::InstRecord *traceData) const
487 {
488 panic("Misc instruction does not support split access method!");
489
490 return NoFault;
491 }
492}};
493

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