1// -*- mode:c++ -*- 2 3// Copyright (c) 2007 MIPS Technologies, Inc. 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 202 unchanged lines hidden (view full) --- 211 return fault; 212 } 213 214 %(op_decl)s; 215 %(op_rd)s; 216 %(ea_code)s; 217 218 if (fault == NoFault) { |
219 fault = readMemAtomic(xc, traceData, EA, Mem, memAccessFlags); |
220 %(memacc_code)s; 221 } 222 223 if (fault == NoFault) { 224 %(op_wb)s; 225 } 226 227 return fault; --- 15 unchanged lines hidden (view full) --- 243 return fault; 244 } 245 246 %(op_src_decl)s; 247 %(op_rd)s; 248 %(ea_code)s; 249 250 if (fault == NoFault) { |
251 fault = readMemTiming(xc, traceData, EA, Mem, memAccessFlags); |
252 } 253 254 return fault; 255 } 256}}; 257 258def template LoadCompleteAcc {{ 259 Fault %(class_name)s::completeAcc(Packet *pkt, --- 7 unchanged lines hidden (view full) --- 267 268 if(fault != NoFault) 269 return fault; 270 } 271 272 %(op_decl)s; 273 %(op_rd)s; 274 |
275 getMem(pkt, Mem, traceData); |
276 277 if (fault == NoFault) { 278 %(memacc_code)s; 279 } 280 281 if (fault == NoFault) { 282 %(op_wb)s; 283 } --- 14 unchanged lines hidden (view full) --- 298 %(op_rd)s; 299 %(ea_code)s; 300 301 if (fault == NoFault) { 302 %(memacc_code)s; 303 } 304 305 if (fault == NoFault) { |
306 fault = writeMemAtomic(xc, traceData, Mem, EA, memAccessFlags, 307 NULL); |
308 } 309 310 if (fault == NoFault) { 311 %(postacc_code)s; 312 } 313 314 if (fault == NoFault) { 315 %(op_wb)s; --- 18 unchanged lines hidden (view full) --- 334 %(op_rd)s; 335 %(ea_code)s; 336 337 if (fault == NoFault) { 338 %(memacc_code)s; 339 } 340 341 if (fault == NoFault) { |
342 fault = writeMemAtomic(xc, traceData, Mem, EA, memAccessFlags, 343 NULL); |
344 } 345 346 if (fault == NoFault) { 347 %(postacc_code)s; 348 } 349 350 if (fault == NoFault) { 351 %(op_wb)s; --- 16 unchanged lines hidden (view full) --- 368 %(op_rd)s; 369 %(ea_code)s; 370 371 if (fault == NoFault) { 372 %(memacc_code)s; 373 } 374 375 if (fault == NoFault) { |
376 fault = writeMemAtomic(xc, traceData, Mem, EA, memAccessFlags, 377 &write_result); |
378 } 379 380 if (fault == NoFault) { 381 %(postacc_code)s; 382 } 383 384 if (fault == NoFault) { 385 %(op_wb)s; --- 15 unchanged lines hidden (view full) --- 401 %(op_rd)s; 402 %(ea_code)s; 403 404 if (fault == NoFault) { 405 %(memacc_code)s; 406 } 407 408 if (fault == NoFault) { |
409 fault = writeMemTiming(xc, traceData, Mem, EA, memAccessFlags, 410 NULL); |
411 } 412 413 return fault; 414 } 415}}; 416 417 418def template StoreCompleteAcc {{ --- 135 unchanged lines hidden (view full) --- 554 (header_output, decoder_output, decode_block, exec_output) = \ 555 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 556 decode_template = ImmNopCheckDecode, 557 exec_template_base = 'Load') 558}}; 559 560def format StoreUnalignedMemory(memacc_code, ea_code = {{ EA = (Rs + disp) & ~3; }}, 561 mem_flags = [], inst_flags = []) {{ |
562 decl_code = ''' 563 uint32_t mem_word = 0; 564 uint32_t unaligned_addr = Rs + disp; 565 uint32_t byte_offset = unaligned_addr & 3; 566 #if BYTE_ORDER == BIG_ENDIAN 567 byte_offset ^= 3; 568 #endif 569 fault = readMemAtomic(xc, traceData, EA, mem_word, memAccessFlags); 570 ''' |
571 memacc_code = decl_code + memacc_code + '\nMem = mem_word;\n' 572 573 (header_output, decoder_output, decode_block, exec_output) = \ 574 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 575 exec_template_base = 'Store') 576}}; 577 578def format Prefetch(ea_code = {{ EA = Rs + disp; }}, --- 18 unchanged lines hidden --- |