mem.isa (4056:f8f1dffc5913) | mem.isa (4661:44458219add1) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2006 The Regents of The University of Michigan 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 55 unchanged lines hidden (view full) --- 64 65 std::string 66 generateDisassembly(Addr pc, const SymbolTable *symtab) const; 67 68 public: 69 70 const StaticInstPtr &eaCompInst() const { return eaCompPtr; } 71 const StaticInstPtr &memAccInst() const { return memAccPtr; } | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2006 The Regents of The University of Michigan 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 55 unchanged lines hidden (view full) --- 64 65 std::string 66 generateDisassembly(Addr pc, const SymbolTable *symtab) const; 67 68 public: 69 70 const StaticInstPtr &eaCompInst() const { return eaCompPtr; } 71 const StaticInstPtr &memAccInst() const { return memAccPtr; } |
72 73 unsigned memAccFlags() { return memAccessFlags; } |
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72 }; 73 74 /** 75 * Base class for a few miscellaneous memory-format insts 76 * that don't interpret the disp field 77 */ 78 class MemoryNoDisp : public Memory 79 { --- 23 unchanged lines hidden (view full) --- 103 std::string 104 MemoryNoDisp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 105 { 106 return csprintf("%-10s %c%d, r%d(r%d)", mnemonic, 107 flags[IsFloating] ? 'f' : 'r', 108 flags[IsFloating] ? FD : RD, 109 RS, RT); 110 } | 74 }; 75 76 /** 77 * Base class for a few miscellaneous memory-format insts 78 * that don't interpret the disp field 79 */ 80 class MemoryNoDisp : public Memory 81 { --- 23 unchanged lines hidden (view full) --- 105 std::string 106 MemoryNoDisp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 107 { 108 return csprintf("%-10s %c%d, r%d(r%d)", mnemonic, 109 flags[IsFloating] ? 'f' : 'r', 110 flags[IsFloating] ? FD : RD, 111 RS, RT); 112 } |
113 |
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111}}; 112 | 114}}; 115 |
116output exec {{ 117 /** return data in cases where there the size of data is only 118 known in the packet 119 */ 120 uint64_t getStoreData(Packet *packet) { 121 switch (packet->getSize()) 122 { 123 case 8: 124 return packet->get<uint8_t>(); 125 126 case 16: 127 return packet->get<uint16_t>(); 128 129 case 32: 130 return packet->get<uint32_t>(); 131 132 case 864: 133 return packet->get<uint64_t>(); 134 135 default: 136 std::cerr << "bad store data size = " << packet->getSize() << std::endl; 137 138 assert(0); 139 return 0; 140 } 141 } 142 143 144}}; 145 |
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113def template LoadStoreDeclare {{ 114 /** 115 * Static instruction class for "%(mnemonic)s". 116 */ 117 class %(class_name)s : public %(base_class)s 118 { 119 protected: 120 121 /** 122 * "Fake" effective address computation class for "%(mnemonic)s". 123 */ 124 class EAComp : public %(base_class)s 125 { 126 public: 127 /// Constructor | 146def template LoadStoreDeclare {{ 147 /** 148 * Static instruction class for "%(mnemonic)s". 149 */ 150 class %(class_name)s : public %(base_class)s 151 { 152 protected: 153 154 /** 155 * "Fake" effective address computation class for "%(mnemonic)s". 156 */ 157 class EAComp : public %(base_class)s 158 { 159 public: 160 /// Constructor |
128 EAComp(MachInst machInst); | 161 EAComp(ExtMachInst machInst); |
129 130 %(BasicExecDeclare)s 131 }; 132 133 /** 134 * "Fake" memory access instruction class for "%(mnemonic)s". 135 */ 136 class MemAcc : public %(base_class)s 137 { 138 public: 139 /// Constructor | 162 163 %(BasicExecDeclare)s 164 }; 165 166 /** 167 * "Fake" memory access instruction class for "%(mnemonic)s". 168 */ 169 class MemAcc : public %(base_class)s 170 { 171 public: 172 /// Constructor |
140 MemAcc(MachInst machInst); | 173 MemAcc(ExtMachInst machInst); |
141 142 %(BasicExecDeclare)s 143 }; 144 145 public: 146 147 /// Constructor. | 174 175 %(BasicExecDeclare)s 176 }; 177 178 public: 179 180 /// Constructor. |
148 %(class_name)s(MachInst machInst); | 181 %(class_name)s(ExtMachInst machInst); |
149 150 %(BasicExecDeclare)s 151 152 %(InitiateAccDeclare)s 153 154 %(CompleteAccDeclare)s | 182 183 %(BasicExecDeclare)s 184 185 %(InitiateAccDeclare)s 186 187 %(CompleteAccDeclare)s |
188 189 %(MemAccSizeDeclare)s |
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155 }; 156}}; 157 158 159def template InitiateAccDeclare {{ 160 Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const; 161}}; 162 163 164def template CompleteAccDeclare {{ | 190 }; 191}}; 192 193 194def template InitiateAccDeclare {{ 195 Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const; 196}}; 197 198 199def template CompleteAccDeclare {{ |
165 Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const; | 200 Fault completeAcc(Packet *, %(CPU_exec_context)s *, Trace::InstRecord *) const; |
166}}; 167 | 201}}; 202 |
203def template MemAccSizeDeclare {{ 204 int memAccSize(%(CPU_exec_context)s *xc); 205}}; |
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168 169def template EACompConstructor {{ 170 /** TODO: change op_class to AddrGenOp or something (requires 171 * creating new member of OpClass enum in op_class.hh, updating 172 * config files, etc.). */ | 206 207def template EACompConstructor {{ 208 /** TODO: change op_class to AddrGenOp or something (requires 209 * creating new member of OpClass enum in op_class.hh, updating 210 * config files, etc.). */ |
173 inline %(class_name)s::EAComp::EAComp(MachInst machInst) | 211 inline %(class_name)s::EAComp::EAComp(ExtMachInst machInst) |
174 : %(base_class)s("%(mnemonic)s (EAComp)", machInst, IntAluOp) 175 { 176 %(constructor)s; 177 } 178}}; 179 180 181def template MemAccConstructor {{ | 212 : %(base_class)s("%(mnemonic)s (EAComp)", machInst, IntAluOp) 213 { 214 %(constructor)s; 215 } 216}}; 217 218 219def template MemAccConstructor {{ |
182 inline %(class_name)s::MemAcc::MemAcc(MachInst machInst) | 220 inline %(class_name)s::MemAcc::MemAcc(ExtMachInst machInst) |
183 : %(base_class)s("%(mnemonic)s (MemAcc)", machInst, %(op_class)s) 184 { 185 %(constructor)s; 186 } 187}}; 188 189 190def template LoadStoreConstructor {{ | 221 : %(base_class)s("%(mnemonic)s (MemAcc)", machInst, %(op_class)s) 222 { 223 %(constructor)s; 224 } 225}}; 226 227 228def template LoadStoreConstructor {{ |
191 inline %(class_name)s::%(class_name)s(MachInst machInst) | 229 inline %(class_name)s::%(class_name)s(ExtMachInst machInst) |
192 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 193 new EAComp(machInst), new MemAcc(machInst)) 194 { 195 %(constructor)s; 196 } 197}}; 198 199 --- 5 unchanged lines hidden (view full) --- 205 Addr EA; 206 Fault fault = NoFault; 207 208 %(fp_enable_check)s; 209 %(op_decl)s; 210 %(op_rd)s; 211 %(ea_code)s; 212 | 230 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 231 new EAComp(machInst), new MemAcc(machInst)) 232 { 233 %(constructor)s; 234 } 235}}; 236 237 --- 5 unchanged lines hidden (view full) --- 243 Addr EA; 244 Fault fault = NoFault; 245 246 %(fp_enable_check)s; 247 %(op_decl)s; 248 %(op_rd)s; 249 %(ea_code)s; 250 |
251 // NOTE: Trace Data is written using execute or completeAcc templates |
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213 if (fault == NoFault) { | 252 if (fault == NoFault) { |
214 %(op_wb)s; | |
215 xc->setEA(EA); 216 } 217 218 return fault; 219 } 220}}; 221 222def template LoadMemAccExecute {{ 223 Fault 224 %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc, 225 Trace::InstRecord *traceData) const 226 { 227 Addr EA; 228 Fault fault = NoFault; 229 | 253 xc->setEA(EA); 254 } 255 256 return fault; 257 } 258}}; 259 260def template LoadMemAccExecute {{ 261 Fault 262 %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc, 263 Trace::InstRecord *traceData) const 264 { 265 Addr EA; 266 Fault fault = NoFault; 267 |
230 %(fp_enable_check)s; | |
231 %(op_decl)s; 232 %(op_rd)s; | 268 %(op_decl)s; 269 %(op_rd)s; |
270 |
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233 EA = xc->getEA(); 234 | 271 EA = xc->getEA(); 272 |
235 if (fault == NoFault) { 236 fault = xc->read(EA, (uint%(mem_acc_size)d_t&)Mem, memAccessFlags); 237 %(memacc_code)s; 238 } | 273 fault = xc->read(EA, (uint%(mem_acc_size)d_t&)Mem, memAccessFlags); |
239 | 274 |
240 if (fault == NoFault) { 241 %(op_wb)s; 242 } | 275 %(memacc_code)s; |
243 | 276 |
277 // NOTE: Write back data using execute or completeAcc templates 278 |
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244 return fault; 245 } 246}}; 247 248 249def template LoadExecute {{ 250 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 251 Trace::InstRecord *traceData) const --- 35 unchanged lines hidden (view full) --- 287 if (fault == NoFault) { 288 fault = xc->read(EA, (uint%(mem_acc_size)d_t &)Mem, memAccessFlags); 289 } 290 291 return fault; 292 } 293}}; 294 | 279 return fault; 280 } 281}}; 282 283 284def template LoadExecute {{ 285 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 286 Trace::InstRecord *traceData) const --- 35 unchanged lines hidden (view full) --- 322 if (fault == NoFault) { 323 fault = xc->read(EA, (uint%(mem_acc_size)d_t &)Mem, memAccessFlags); 324 } 325 326 return fault; 327 } 328}}; 329 |
295 | |
296def template LoadCompleteAcc {{ | 330def template LoadCompleteAcc {{ |
297 Fault %(class_name)s::completeAcc(PacketPtr pkt, | 331 Fault %(class_name)s::completeAcc(Packet *pkt, |
298 %(CPU_exec_context)s *xc, 299 Trace::InstRecord *traceData) const 300 { 301 Fault fault = NoFault; 302 303 %(fp_enable_check)s; 304 %(op_decl)s; | 332 %(CPU_exec_context)s *xc, 333 Trace::InstRecord *traceData) const 334 { 335 Fault fault = NoFault; 336 337 %(fp_enable_check)s; 338 %(op_decl)s; |
339 %(op_rd)s; |
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305 306 Mem = pkt->get<typeof(Mem)>(); 307 308 if (fault == NoFault) { 309 %(memacc_code)s; 310 } 311 312 if (fault == NoFault) { 313 %(op_wb)s; 314 } 315 316 return fault; 317 } 318}}; 319 320 | 340 341 Mem = pkt->get<typeof(Mem)>(); 342 343 if (fault == NoFault) { 344 %(memacc_code)s; 345 } 346 347 if (fault == NoFault) { 348 %(op_wb)s; 349 } 350 351 return fault; 352 } 353}}; 354 355 |
356 357def template LoadStoreMemAccSize {{ 358 int %(class_name)s::memAccSize(%(CPU_exec_context)s *xc) 359 { 360 // Return the memory access size in bytes 361 return (%(mem_acc_size)d / 8); 362 } 363}}; 364 |
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321def template StoreMemAccExecute {{ 322 Fault 323 %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc, 324 Trace::InstRecord *traceData) const 325 { 326 Addr EA; 327 Fault fault = NoFault; | 365def template StoreMemAccExecute {{ 366 Fault 367 %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc, 368 Trace::InstRecord *traceData) const 369 { 370 Addr EA; 371 Fault fault = NoFault; |
372 uint64_t write_result = 0; |
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328 329 %(fp_enable_check)s; 330 %(op_decl)s; 331 %(op_rd)s; | 373 374 %(fp_enable_check)s; 375 %(op_decl)s; 376 %(op_rd)s; |
377 |
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332 EA = xc->getEA(); 333 334 if (fault == NoFault) { 335 %(memacc_code)s; 336 } 337 338 if (fault == NoFault) { 339 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, | 378 EA = xc->getEA(); 379 380 if (fault == NoFault) { 381 %(memacc_code)s; 382 } 383 384 if (fault == NoFault) { 385 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, |
340 memAccessFlags, NULL); 341 if (traceData) { traceData->setData(Mem); } | 386 memAccessFlags, &write_result); 387 // @NOTE: Need to Call Complete Access to Set Trace Data 388 //if (traceData) { traceData->setData(Mem); } |
342 } 343 | 389 } 390 |
344 if (fault == NoFault) { 345 %(postacc_code)s; 346 } 347 348 if (fault == NoFault) { 349 %(op_wb)s; 350 } 351 | |
352 return fault; 353 } 354}}; 355 356def template StoreCondMemAccExecute {{ 357 Fault 358 %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc, 359 Trace::InstRecord *traceData) const --- 24 unchanged lines hidden (view full) --- 384 if (fault == NoFault) { 385 %(op_wb)s; 386 } 387 388 return fault; 389 } 390}}; 391 | 391 return fault; 392 } 393}}; 394 395def template StoreCondMemAccExecute {{ 396 Fault 397 %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc, 398 Trace::InstRecord *traceData) const --- 24 unchanged lines hidden (view full) --- 423 if (fault == NoFault) { 424 %(op_wb)s; 425 } 426 427 return fault; 428 } 429}}; 430 |
392 | |
393def template StoreExecute {{ 394 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 395 Trace::InstRecord *traceData) const 396 { 397 Addr EA; 398 Fault fault = NoFault; | 431def template StoreExecute {{ 432 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 433 Trace::InstRecord *traceData) const 434 { 435 Addr EA; 436 Fault fault = NoFault; |
437 uint64_t write_result = 0; |
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399 400 %(fp_enable_check)s; 401 %(op_decl)s; 402 %(op_rd)s; 403 %(ea_code)s; 404 405 if (fault == NoFault) { 406 %(memacc_code)s; 407 } 408 409 if (fault == NoFault) { 410 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, | 438 439 %(fp_enable_check)s; 440 %(op_decl)s; 441 %(op_rd)s; 442 %(ea_code)s; 443 444 if (fault == NoFault) { 445 %(memacc_code)s; 446 } 447 448 if (fault == NoFault) { 449 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA, |
411 memAccessFlags, NULL); | 450 memAccessFlags, &write_result); |
412 if (traceData) { traceData->setData(Mem); } 413 } 414 415 if (fault == NoFault) { 416 %(postacc_code)s; 417 } 418 419 if (fault == NoFault) { --- 62 unchanged lines hidden (view full) --- 482 } 483 484 return fault; 485 } 486}}; 487 488 489def template StoreCompleteAcc {{ | 451 if (traceData) { traceData->setData(Mem); } 452 } 453 454 if (fault == NoFault) { 455 %(postacc_code)s; 456 } 457 458 if (fault == NoFault) { --- 62 unchanged lines hidden (view full) --- 521 } 522 523 return fault; 524 } 525}}; 526 527 528def template StoreCompleteAcc {{ |
490 Fault %(class_name)s::completeAcc(PacketPtr pkt, | 529 Fault %(class_name)s::completeAcc(Packet *pkt, |
491 %(CPU_exec_context)s *xc, 492 Trace::InstRecord *traceData) const 493 { 494 Fault fault = NoFault; 495 496 %(fp_enable_check)s; 497 %(op_dest_decl)s; 498 499 if (fault == NoFault) { 500 %(postacc_code)s; 501 } 502 503 if (fault == NoFault) { 504 %(op_wb)s; | 530 %(CPU_exec_context)s *xc, 531 Trace::InstRecord *traceData) const 532 { 533 Fault fault = NoFault; 534 535 %(fp_enable_check)s; 536 %(op_dest_decl)s; 537 538 if (fault == NoFault) { 539 %(postacc_code)s; 540 } 541 542 if (fault == NoFault) { 543 %(op_wb)s; |
544 545 if (traceData) { traceData->setData(getStoreData(pkt)); } |
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505 } 506 507 return fault; 508 } 509}}; 510 511def template StoreCondCompleteAcc {{ | 546 } 547 548 return fault; 549 } 550}}; 551 552def template StoreCondCompleteAcc {{ |
512 Fault %(class_name)s::completeAcc(PacketPtr pkt, | 553 Fault %(class_name)s::completeAcc(Packet *pkt, |
513 %(CPU_exec_context)s *xc, 514 Trace::InstRecord *traceData) const 515 { 516 Fault fault = NoFault; 517 518 %(fp_enable_check)s; 519 %(op_dest_decl)s; 520 --- 58 unchanged lines hidden (view full) --- 579 { 580 panic("Misc instruction does not support split access method!"); 581 return NoFault; 582 } 583}}; 584 585 586def template MiscCompleteAcc {{ | 554 %(CPU_exec_context)s *xc, 555 Trace::InstRecord *traceData) const 556 { 557 Fault fault = NoFault; 558 559 %(fp_enable_check)s; 560 %(op_dest_decl)s; 561 --- 58 unchanged lines hidden (view full) --- 620 { 621 panic("Misc instruction does not support split access method!"); 622 return NoFault; 623 } 624}}; 625 626 627def template MiscCompleteAcc {{ |
587 Fault %(class_name)s::completeAcc(PacketPtr pkt, | 628 Fault %(class_name)s::completeAcc(Packet *pkt, |
588 %(CPU_exec_context)s *xc, 589 Trace::InstRecord *traceData) const 590 { 591 panic("Misc instruction does not support split access method!"); 592 593 return NoFault; 594 } 595}}; 596 | 629 %(CPU_exec_context)s *xc, 630 Trace::InstRecord *traceData) const 631 { 632 panic("Misc instruction does not support split access method!"); 633 634 return NoFault; 635 } 636}}; 637 |
638 639def template MiscMemAccSize {{ 640 int %(class_name)s::memAccSize(%(CPU_exec_context)s *xc) 641 { 642 panic("Misc instruction does not support split access method!"); 643 return 0; 644 } 645}}; 646 |
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597def format LoadMemory(memacc_code, ea_code = {{ EA = Rs + disp; }}, 598 mem_flags = [], inst_flags = []) {{ 599 (header_output, decoder_output, decode_block, exec_output) = \ 600 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 601 decode_template = ImmNopCheckDecode, 602 exec_template_base = 'Load') 603}}; 604 --- 40 unchanged lines hidden (view full) --- 645 mem_flags = [], inst_flags = []) {{ 646 decl_code = 'uint32_t mem_word = 0;\n' 647 decl_code += 'uint32_t unaligned_addr = Rs + disp;\n' 648 decl_code += 'uint32_t byte_offset = unaligned_addr & 3;\n' 649 decl_code += '#if BYTE_ORDER == BIG_ENDIAN\n' 650 decl_code += '\tbyte_offset ^= 3;\n' 651 decl_code += '#endif\n' 652 decl_code += 'fault = xc->read(EA, (uint32_t&)mem_word, memAccessFlags);\n' | 647def format LoadMemory(memacc_code, ea_code = {{ EA = Rs + disp; }}, 648 mem_flags = [], inst_flags = []) {{ 649 (header_output, decoder_output, decode_block, exec_output) = \ 650 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 651 decode_template = ImmNopCheckDecode, 652 exec_template_base = 'Load') 653}}; 654 --- 40 unchanged lines hidden (view full) --- 695 mem_flags = [], inst_flags = []) {{ 696 decl_code = 'uint32_t mem_word = 0;\n' 697 decl_code += 'uint32_t unaligned_addr = Rs + disp;\n' 698 decl_code += 'uint32_t byte_offset = unaligned_addr & 3;\n' 699 decl_code += '#if BYTE_ORDER == BIG_ENDIAN\n' 700 decl_code += '\tbyte_offset ^= 3;\n' 701 decl_code += '#endif\n' 702 decl_code += 'fault = xc->read(EA, (uint32_t&)mem_word, memAccessFlags);\n' |
703 #decl_code += 'xc->readFunctional(EA,(uint32_t&)mem_word);' |
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653 memacc_code = decl_code + memacc_code + '\nMem = mem_word;\n' 654 655 (header_output, decoder_output, decode_block, exec_output) = \ 656 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 657 exec_template_base = 'Store') 658}}; 659 660def format Prefetch(ea_code = {{ EA = Rs + disp; }}, --- 19 unchanged lines hidden --- | 704 memacc_code = decl_code + memacc_code + '\nMem = mem_word;\n' 705 706 (header_output, decoder_output, decode_block, exec_output) = \ 707 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags, 708 exec_template_base = 'Store') 709}}; 710 711def format Prefetch(ea_code = {{ EA = Rs + disp; }}, --- 19 unchanged lines hidden --- |