int.isa (8588:ef28ed90449d) int.isa (10196:be0e1724eb39)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 MIPS Technologies, Inc.
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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128
129
130 };
131
132}};
133
134// HiLo instruction class execute method template.
135def template HiLoExecute {{
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 MIPS Technologies, Inc.
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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128
129
130 };
131
132}};
133
134// HiLo instruction class execute method template.
135def template HiLoExecute {{
136 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
136 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
137 {
138 Fault fault = NoFault;
139
140 %(fp_enable_check)s;
141 %(op_decl)s;
142 %(op_rd)s;
143 %(code)s;
144
145 if(fault == NoFault)
146 {
147 %(op_wb)s;
148 }
149 return fault;
150 }
151}};
152
153// HiLoRsSel instruction class execute method template.
154def template HiLoRsSelExecute {{
137 {
138 Fault fault = NoFault;
139
140 %(fp_enable_check)s;
141 %(op_decl)s;
142 %(op_rd)s;
143 %(code)s;
144
145 if(fault == NoFault)
146 {
147 %(op_wb)s;
148 }
149 return fault;
150 }
151}};
152
153// HiLoRsSel instruction class execute method template.
154def template HiLoRsSelExecute {{
155 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
155 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
156 {
157 Fault fault = NoFault;
158
159 %(op_decl)s;
160
161 if( ACSRC > 0 && !isDspEnabled(xc) )
162 {
163 fault = new DspStateDisabledFault();

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173 %(op_wb)s;
174 }
175 return fault;
176 }
177}};
178
179// HiLoRdSel instruction class execute method template.
180def template HiLoRdSelExecute {{
156 {
157 Fault fault = NoFault;
158
159 %(op_decl)s;
160
161 if( ACSRC > 0 && !isDspEnabled(xc) )
162 {
163 fault = new DspStateDisabledFault();

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173 %(op_wb)s;
174 }
175 return fault;
176 }
177}};
178
179// HiLoRdSel instruction class execute method template.
180def template HiLoRdSelExecute {{
181 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
181 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
182 {
183 Fault fault = NoFault;
184
185 %(op_decl)s;
186
187 if( ACDST > 0 && !isDspEnabled(xc) )
188 {
189 fault = new DspStateDisabledFault();

--- 192 unchanged lines hidden --- 		182 {
183 Fault fault = NoFault;
184
185 %(op_decl)s;
186
187 if( ACDST > 0 && !isDspEnabled(xc) )
188 {
189 fault = new DspStateDisabledFault();

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