fp.isa (4675:598d4c33c38d) | fp.isa (5222:bb733a878f85) |
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1// -*- mode:c++ -*- 2 | 1// -*- mode:c++ -*- 2 |
3// Copyright (c) 2006 The Regents of The University of Michigan 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright 9// notice, this list of conditions and the following disclaimer; 10// redistributions in binary form must reproduce the above copyright 11// notice, this list of conditions and the following disclaimer in the 12// documentation and/or other materials provided with the distribution; 13// neither the name of the copyright holders nor the names of its 14// contributors may be used to endorse or promote products derived from 15// this software without specific prior written permission. 16// 17// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28// 29// Authors: Korey Sewell | 3// Copyright N) 2007 MIPS Technologies, Inc. All Rights Reserved |
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5// This software is part of the M5 simulator. 6 7// THIS IS A LEGAL AGREEMENT. BY DOWNLOADING, USING, COPYING, CREATING 8// DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING 9// TO THESE TERMS AND CONDITIONS. 10 11// Permission is granted to use, copy, create derivative works and 12// distribute this software and such derivative works for any purpose, 13// so long as (1) the copyright notice above, this grant of permission, 14// and the disclaimer below appear in all copies and derivative works 15// made, (2) the copyright notice above is augmented as appropriate to 16// reflect the addition of any new copyrightable work in a derivative 17// work (e.g., Copyright N) <Publication Year> Copyright Owner), and (3) 18// the name of MIPS Technologies, Inc. ($(B!H(BMIPS$(B!I(B) is not used in any 19// advertising or publicity pertaining to the use or distribution of 20// this software without specific, written prior authorization. 21 22// THIS SOFTWARE IS PROVIDED $(B!H(BAS IS.$(B!I(B MIPS MAKES NO WARRANTIES AND 23// DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR 24// OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 25// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND 26// NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE. 27// IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT, 28// INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF 29// ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT, 30// THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY 31// IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR 32// STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE 33// POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE. 34 35//Authors: Korey L. Sewell 36 |
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31//////////////////////////////////////////////////////////////////// 32// 33// Floating Point operate instructions 34// 35 36output header {{ 37 /** 38 * Base class for FP operations. --- 47 unchanged lines hidden (view full) --- 86 } 87}}; 88 89output exec {{ 90 inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc) 91 { 92 //@TODO: Implement correct CP0 checks to see if the CP1 93 // unit is enable or not | 37//////////////////////////////////////////////////////////////////// 38// 39// Floating Point operate instructions 40// 41 42output header {{ 43 /** 44 * Base class for FP operations. --- 47 unchanged lines hidden (view full) --- 92 } 93}}; 94 95output exec {{ 96 inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc) 97 { 98 //@TODO: Implement correct CP0 checks to see if the CP1 99 // unit is enable or not |
94 return NoFault; | 100 if (!isCoprocessorEnabled(xc, 1)) 101 return new CoprocessorUnusableFault(1); 102 103 return NoFault; |
95 } 96 97 //If any operand is Nan return the appropriate QNaN 98 template <class T> 99 bool 100 fpNanOperands(FPOp *inst, %(CPU_exec_context)s *xc, const T &src_type, 101 Trace::InstRecord *traceData) 102 { --- 75 unchanged lines hidden (view full) --- 178 179def template FloatingPointExecute {{ 180 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const 181 { 182 Fault fault = NoFault; 183 184 %(fp_enable_check)s; 185 | 104 } 105 106 //If any operand is Nan return the appropriate QNaN 107 template <class T> 108 bool 109 fpNanOperands(FPOp *inst, %(CPU_exec_context)s *xc, const T &src_type, 110 Trace::InstRecord *traceData) 111 { --- 75 unchanged lines hidden (view full) --- 187 188def template FloatingPointExecute {{ 189 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const 190 { 191 Fault fault = NoFault; 192 193 %(fp_enable_check)s; 194 |
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186 //When is the right time to reset cause bits? 187 //start of every instruction or every cycle? 188#if FULL_SYSTEM 189 fpResetCauseBits(xc); 190#endif 191 %(op_decl)s; 192 %(op_rd)s; 193 --- 189 unchanged lines hidden --- | 196 //When is the right time to reset cause bits? 197 //start of every instruction or every cycle? 198#if FULL_SYSTEM 199 fpResetCauseBits(xc); 200#endif 201 %(op_decl)s; 202 %(op_rd)s; 203 --- 189 unchanged lines hidden --- |