| fp.isa (4661:44458219add1) | fp.isa (4675:598d4c33c38d) |
|---|---|
| 1// -*- mode:c++ -*- 2 3// Copyright (c) 2006 The Regents of The University of Michigan 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 136 unchanged lines hidden (view full) --- 145 } 146 147 //Set value to QNAN 148 cpu->setFloatRegOperandBits(inst, 0, mips_nan, size); 149 150 //Read FCSR from FloatRegFile 151 uint32_t fcsr_bits = cpu->tcBase()->readFloatRegBits(FCSR); 152 | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2006 The Regents of The University of Michigan 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 136 unchanged lines hidden (view full) --- 145 } 146 147 //Set value to QNAN 148 cpu->setFloatRegOperandBits(inst, 0, mips_nan, size); 149 150 //Read FCSR from FloatRegFile 151 uint32_t fcsr_bits = cpu->tcBase()->readFloatRegBits(FCSR); 152 |
| 153 uint32_t new_fcsr = genInvalidVector(fcsr_bits); 154 |
|
| 153 //Write FCSR from FloatRegFile | 155 //Write FCSR from FloatRegFile |
| 154 cpu->tcBase()->setFloatRegOperandBits(FCSR, genInvalidVector(fcsr_bits)); | 156 cpu->tcBase()->setFloatRegBits(FCSR, new_fcsr); |
| 155 156 if (traceData) { traceData->setData(mips_nan); } 157 return true; 158 } 159 160 return false; 161 } 162 --- 218 unchanged lines hidden --- | 157 158 if (traceData) { traceData->setData(mips_nan); } 159 return true; 160 } 161 162 return false; 163 } 164 --- 218 unchanged lines hidden --- |