1// -*- mode:c++ -*- 2 3// Copyright (c) 2007 MIPS Technologies, Inc. 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 114 unchanged lines hidden (view full) --- 123// Basic instruction class execute method template. 124def template ControlTLBExecute {{ 125 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const 126 { 127 Fault fault = NoFault; 128 %(op_decl)s; 129 %(op_rd)s; 130 |
131 if (FullSystem) { |
132 if (isCoprocessor0Enabled(xc)) { 133 if(isMMUTLB(xc)){ 134 %(code)s; 135 } else { 136 fault = new ReservedInstructionFault(); 137 } 138 } else { 139 fault = new CoprocessorUnusableFault(0); --- 31 unchanged lines hidden (view full) --- 171 } 172 173}}; 174 175output exec {{ 176 bool 177 isCoprocessorEnabled(%(CPU_exec_context)s *xc, unsigned cop_num) 178 { |
179 if (!FullSystem) |
180 return true; 181 182 MiscReg Stat = xc->readMiscReg(MISCREG_STATUS); 183 if (cop_num == 0) { 184 MiscReg Dbg = xc->readMiscReg(MISCREG_DEBUG); 185 // In Stat, EXL, ERL or CU0 set, CP0 accessible 186 // In Dbg, DM bit set, CP0 accessible 187 // In Stat, KSU = 0, kernel mode is base mode --- 5 unchanged lines hidden (view full) --- 193 } else { 194 panic("Invalid Coprocessor Number Specified"); 195 } 196 } 197 198 bool inline 199 isCoprocessor0Enabled(%(CPU_exec_context)s *xc) 200 { |
201 if (FullSystem) { |
202 MiscReg Stat = xc->readMiscReg(MISCREG_STATUS); 203 MiscReg Dbg = xc->readMiscReg(MISCREG_DEBUG); 204 // In Stat, EXL, ERL or CU0 set, CP0 accessible 205 // In Dbg, DM bit set, CP0 accessible 206 // In Stat KSU = 0, kernel mode is base mode 207 return (Stat & 0x10000006) || (Dbg & 0x40000000) || 208 !(Stat & 0x00000018); 209 } else { 210 return true; 211 } 212 } 213 214 bool 215 isMMUTLB(%(CPU_exec_context)s *xc) 216 { 217 MiscReg Config = xc->readMiscReg(MISCREG_CONFIG); |
218 return FullSystem && (Config & 0x380) == 0x80; |
219 } 220}}; 221 222def format CP0Control(code, *flags) {{ 223 flags += ('IsNonSpeculative', ) 224 iop = InstObjParams(name, Name, 'CP0Control', code, flags) 225 header_output = BasicDeclare.subst(iop) 226 decoder_output = BasicConstructor.subst(iop) --- 21 unchanged lines hidden --- |