1// -*- mode:c++ -*- 2 3// Copyright (c) 2007 MIPS Technologies, Inc. 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 66 unchanged lines hidden (view full) --- 75 76 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 77 }; 78 79}}; 80 81// Basic instruction class execute method template. 82def template CP0Execute {{ |
83 Fault %(class_name)s::execute( 84 ExecContext *xc, Trace::InstRecord *traceData) const |
85 { 86 Fault fault = NoFault; 87 %(op_decl)s; 88 %(op_rd)s; 89 90 if (isCoprocessorEnabled(xc, 0)) { 91 %(code)s; 92 --- 4 unchanged lines hidden (view full) --- 97 } else { 98 fault = std::make_shared<CoprocessorUnusableFault>(0); 99 } 100 return fault; 101 } 102}}; 103 104def template CP1Execute {{ |
105 Fault %(class_name)s::execute( 106 ExecContext *xc, Trace::InstRecord *traceData) const |
107 { 108 Fault fault = NoFault; 109 %(op_decl)s; 110 %(op_rd)s; 111 112 if (isCoprocessorEnabled(xc, 1)) { 113 %(code)s; 114 } else { --- 4 unchanged lines hidden (view full) --- 119 { 120 %(op_wb)s; 121 } 122 return fault; 123 } 124}}; 125// Basic instruction class execute method template. 126def template ControlTLBExecute {{ |
127 Fault %(class_name)s::execute( 128 ExecContext *xc, Trace::InstRecord *traceData) const |
129 { 130 Fault fault = NoFault; 131 %(op_decl)s; 132 %(op_rd)s; 133 134 if (FullSystem) { 135 if (isCoprocessor0Enabled(xc)) { 136 if(isMMUTLB(xc)){ --- 34 unchanged lines hidden (view full) --- 171 std::stringstream ss; 172 ccprintf(ss, "%-10s r%d, f%d", mnemonic, RT, FS); 173 return ss.str(); 174 } 175 176}}; 177 178output header {{ |
179 bool isCoprocessorEnabled(ExecContext *xc, unsigned cop_num); |
180 |
181 bool isMMUTLB(ExecContext *xc); |
182 183}}; 184 185output exec {{ 186 bool |
187 isCoprocessorEnabled(ExecContext *xc, unsigned cop_num) |
188 { 189 if (!FullSystem) 190 return true; 191 192 MiscReg Stat = xc->readMiscReg(MISCREG_STATUS); 193 if (cop_num == 0) { 194 MiscReg Dbg = xc->readMiscReg(MISCREG_DEBUG); 195 // In Stat, EXL, ERL or CU0 set, CP0 accessible --- 5 unchanged lines hidden (view full) --- 201 } else if (cop_num < 4) { 202 return Stat & (0x10000000 << cop_num); // CU is reset 203 } else { 204 panic("Invalid Coprocessor Number Specified"); 205 } 206 } 207 208 bool inline |
209 isCoprocessor0Enabled(ExecContext *xc) |
210 { 211 if (FullSystem) { 212 MiscReg Stat = xc->readMiscReg(MISCREG_STATUS); 213 MiscReg Dbg = xc->readMiscReg(MISCREG_DEBUG); 214 // In Stat, EXL, ERL or CU0 set, CP0 accessible 215 // In Dbg, DM bit set, CP0 accessible 216 // In Stat KSU = 0, kernel mode is base mode 217 return (Stat & 0x10000006) || (Dbg & 0x40000000) || 218 !(Stat & 0x00000018); 219 } else { 220 return true; 221 } 222 } 223 224 bool |
225 isMMUTLB(ExecContext *xc) |
226 { 227 MiscReg Config = xc->readMiscReg(MISCREG_CONFIG); 228 return FullSystem && (Config & 0x380) == 0x80; 229 } 230}}; 231 232def format CP0Control(code, *flags) {{ 233 flags += ('IsNonSpeculative', ) --- 24 unchanged lines hidden --- |