Cross Reference: /gem5/src/arch/mips/isa/formats/control.isa

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< Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
---
> Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
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< Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
---
> Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
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< Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
---
> Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, Trace::InstRecord *traceData) const
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< isCoprocessorEnabled(%(CPU_exec_context)s *xc, unsigned cop_num)
---
> isCoprocessorEnabled(CPU_EXEC_CONTEXT *xc, unsigned cop_num)
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< isCoprocessor0Enabled(%(CPU_exec_context)s *xc)
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> isCoprocessor0Enabled(CPU_EXEC_CONTEXT *xc)
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< isMMUTLB(%(CPU_exec_context)s *xc)
---
> isMMUTLB(CPU_EXEC_CONTEXT *xc)