branch.isa (5202:ff56fa8c2091) branch.isa (5222:bb733a878f85)
1// -*- mode:c++ -*-
2
1// -*- mode:c++ -*-
2
3// Copyright (c) 2006 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright
9// notice, this list of conditions and the following disclaimer;
10// redistributions in binary form must reproduce the above copyright
11// notice, this list of conditions and the following disclaimer in the
12// documentation and/or other materials provided with the distribution;
13// neither the name of the copyright holders nor the names of its
14// contributors may be used to endorse or promote products derived from
15// this software without specific prior written permission.
16//
17// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28//
29// Authors: Korey Sewell
3// Copyright .AN) 2007 MIPS Technologies, Inc. All Rights Reserved
30
4
5// This software is part of the M5 simulator.
6
7// THIS IS A LEGAL AGREEMENT. BY DOWNLOADING, USING, COPYING, CREATING
8// DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING
9// TO THESE TERMS AND CONDITIONS.
10
11// Permission is granted to use, copy, create derivative works and
12// distribute this software and such derivative works for any purpose,
13// so long as (1) the copyright notice above, this grant of permission,
14// and the disclaimer below appear in all copies and derivative works
15// made, (2) the copyright notice above is augmented as appropriate to
16// reflect the addition of any new copyrightable work in a derivative
17// work (e.g., Copyright .AN) <Publication Year> Copyright Owner), and (3)
18// the name of MIPS Technologies, Inc. ($B!H(BMIPS$B!I(B) is not used in any
19// advertising or publicity pertaining to the use or distribution of
20// this software without specific, written prior authorization.
21
22// THIS SOFTWARE IS PROVIDED $B!H(BAS IS.$B!I(B MIPS MAKES NO WARRANTIES AND
23// DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR
24// OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
26// NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE.
27// IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT,
28// INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF
29// ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT,
30// THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY
31// IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR
32// STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE
33// POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE.
34
35//Authors: Korey L. Sewell
36
31////////////////////////////////////////////////////////////////////
32//
33// Control transfer instructions
34//
35
36output header {{
37
38#include <iostream>

--- 89 unchanged lines hidden (view full) ---

128 Branch::branchTarget(Addr branchPC) const
129 {
130 return branchPC + 4 + disp;
131 }
132
133 Addr
134 Jump::branchTarget(ThreadContext *tc) const
135 {
37////////////////////////////////////////////////////////////////////
38//
39// Control transfer instructions
40//
41
42output header {{
43
44#include <iostream>

--- 89 unchanged lines hidden (view full) ---

134 Branch::branchTarget(Addr branchPC) const
135 {
136 return branchPC + 4 + disp;
137 }
138
139 Addr
140 Jump::branchTarget(ThreadContext *tc) const
141 {
136 Addr NPC = tc->readPC() + 4;
137 uint64_t Rb = tc->readIntReg(_srcRegIdx[0]);
138 return (Rb & ~3) | (NPC & 1);
142 Addr NPC = tc->readNextPC();
143 return (NPC & 0xF0000000) | (disp);
139 }
140
141 const std::string &
142 PCDependentDisassembly::disassemble(Addr pc,
143 const SymbolTable *symtab) const
144 {
145 if (!cachedDisassembly ||
146 pc != cachedPC || symtab != cachedSymtab)

--- 44 unchanged lines hidden (view full) ---

191
192 std::string
193 Jump::generateDisassembly(Addr pc, const SymbolTable *symtab) const
194 {
195 std::stringstream ss;
196
197 ccprintf(ss, "%-10s ", mnemonic);
198
144 }
145
146 const std::string &
147 PCDependentDisassembly::disassemble(Addr pc,
148 const SymbolTable *symtab) const
149 {
150 if (!cachedDisassembly ||
151 pc != cachedPC || symtab != cachedSymtab)

--- 44 unchanged lines hidden (view full) ---

196
197 std::string
198 Jump::generateDisassembly(Addr pc, const SymbolTable *symtab) const
199 {
200 std::stringstream ss;
201
202 ccprintf(ss, "%-10s ", mnemonic);
203
199 if (strcmp(mnemonic, "jal") == 0) {
204 if ( mnemonic == "jal" ) {
200 Addr npc = pc + 4;
201 ccprintf(ss,"0x%x",(npc & 0xF0000000) | disp);
202 } else if (_numSrcRegs == 0) {
203 std::string str;
204 if (symtab && symtab->findSymbol(disp, str))
205 ss << str;
206 else
207 ccprintf(ss, "0x%x", disp);

--- 117 unchanged lines hidden --- 		205 Addr npc = pc + 4;
206 ccprintf(ss,"0x%x",(npc & 0xF0000000) | disp);
207 } else if (_numSrcRegs == 0) {
208 std::string str;
209 if (symtab && symtab->findSymbol(disp, str))
210 ss << str;
211 else
212 ccprintf(ss, "0x%x", disp);

--- 117 unchanged lines hidden ---