decoder.isa (7708:956ac83b0a58) | decoder.isa (7720:65d338a8dba4) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2007 MIPS Technologies, Inc. 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 119 unchanged lines hidden (view full) --- 128 0x1: decode FUNCTION_LO { 129 //Table A-3 Note: "Specific encodings of the hint field are 130 //used to distinguish JR from JR.HB and JALR from JALR.HB" 131 format Jump { 132 0x0: decode HINT { 133 0x1: jr_hb({{ 134 Config1Reg config1 = Config1; 135 if (config1.ca == 0) { | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2007 MIPS Technologies, Inc. 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 119 unchanged lines hidden (view full) --- 128 0x1: decode FUNCTION_LO { 129 //Table A-3 Note: "Specific encodings of the hint field are 130 //used to distinguish JR from JR.HB and JALR from JALR.HB" 131 format Jump { 132 0x0: decode HINT { 133 0x1: jr_hb({{ 134 Config1Reg config1 = Config1; 135 if (config1.ca == 0) { |
136 NNPC = Rs; | 136 pc.nnpc(Rs); |
137 } else { 138 panic("MIPS16e not supported\n"); 139 } | 137 } else { 138 panic("MIPS16e not supported\n"); 139 } |
140 PCS = pc; |
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140 }}, IsReturn, ClearHazards); 141 default: jr({{ 142 Config1Reg config1 = Config1; 143 if (config1.ca == 0) { | 141 }}, IsReturn, ClearHazards); 142 default: jr({{ 143 Config1Reg config1 = Config1; 144 if (config1.ca == 0) { |
144 NNPC = Rs; | 145 pc.nnpc(Rs); |
145 } else { 146 panic("MIPS16e not supported\n"); 147 } | 146 } else { 147 panic("MIPS16e not supported\n"); 148 } |
149 PCS = pc; |
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148 }}, IsReturn); 149 } 150 151 0x1: decode HINT { | 150 }}, IsReturn); 151 } 152 153 0x1: decode HINT { |
152 0x1: jalr_hb({{ Rd = NNPC; NNPC = Rs; }}, IsCall 153 , ClearHazards); 154 default: jalr({{ Rd = NNPC; NNPC = Rs; }}, IsCall); | 154 0x1: jalr_hb({{ 155 Rd = pc.nnpc(); 156 pc.nnpc(Rs); 157 PCS = pc; 158 }}, IsCall, ClearHazards); 159 default: jalr({{ 160 Rd = pc.nnpc(); 161 pc.nnpc(Rs); 162 PCS = pc; 163 }}, IsCall); |
155 } 156 } 157 158 format BasicOp { 159 0x2: movz({{ Rd = (Rt == 0) ? Rs : Rd; }}); 160 0x3: movn({{ Rd = (Rt != 0) ? Rs : Rd; }}); 161#if FULL_SYSTEM 162 0x4: syscall({{ fault = new SystemCallFault(); }}); --- 155 unchanged lines hidden (view full) --- 318 0x4: DspBranch::bposge32({{ cond = (dspctl<5:0> >= 32); }}); 319 format WarnUnimpl { 320 0x7: synci(); 321 } 322 } 323 } 324 325 format Jump { | 164 } 165 } 166 167 format BasicOp { 168 0x2: movz({{ Rd = (Rt == 0) ? Rs : Rd; }}); 169 0x3: movn({{ Rd = (Rt != 0) ? Rs : Rd; }}); 170#if FULL_SYSTEM 171 0x4: syscall({{ fault = new SystemCallFault(); }}); --- 155 unchanged lines hidden (view full) --- 327 0x4: DspBranch::bposge32({{ cond = (dspctl<5:0> >= 32); }}); 328 format WarnUnimpl { 329 0x7: synci(); 330 } 331 } 332 } 333 334 format Jump { |
326 0x2: j({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2); }}); 327 0x3: jal({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2); }}, 328 IsCall, Link); | 335 0x2: j({{ 336 pc.nnpc((pc.npc() & 0xF0000000) | (JMPTARG << 2)); 337 PCS = pc; 338 }}); 339 0x3: jal({{ 340 pc.nnpc((pc.npc() & 0xF0000000) | (JMPTARG << 2)); 341 PCS = pc; 342 }}, IsCall, Link); |
329 } 330 331 format Branch { 332 0x4: decode RS_RT { 333 0x0: b({{ cond = 1; }}); 334 default: beq({{ cond = (Rs.sw == Rt.sw); }}); 335 } 336 0x5: bne({{ cond = (Rs.sw != Rt.sw); }}); --- 352 unchanged lines hidden (view full) --- 689 //Table A-12 MIPS32 COP0 Encoding of Function Field When rs=CO 690 0x1: decode FUNCTION { 691 format CP0Control { 692 0x18: eret({{ 693 StatusReg status = Status; 694 ConfigReg config = Config; 695 SRSCtlReg srsCtl = SRSCtl; 696 DPRINTF(MipsPRA,"Restoring PC - %x\n",EPC); | 343 } 344 345 format Branch { 346 0x4: decode RS_RT { 347 0x0: b({{ cond = 1; }}); 348 default: beq({{ cond = (Rs.sw == Rt.sw); }}); 349 } 350 0x5: bne({{ cond = (Rs.sw != Rt.sw); }}); --- 352 unchanged lines hidden (view full) --- 703 //Table A-12 MIPS32 COP0 Encoding of Function Field When rs=CO 704 0x1: decode FUNCTION { 705 format CP0Control { 706 0x18: eret({{ 707 StatusReg status = Status; 708 ConfigReg config = Config; 709 SRSCtlReg srsCtl = SRSCtl; 710 DPRINTF(MipsPRA,"Restoring PC - %x\n",EPC); |
711 MipsISA::PCState pc = PCS; |
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697 if (status.erl == 1) { 698 status.erl = 0; | 712 if (status.erl == 1) { 713 status.erl = 0; |
699 NPC = ErrorEPC; | 714 pc.npc(ErrorEPC); |
700 // Need to adjust NNPC, otherwise things break | 715 // Need to adjust NNPC, otherwise things break |
701 NNPC = ErrorEPC + sizeof(MachInst); | 716 pc.nnpc(ErrorEPC + sizeof(MachInst)); |
702 } else { | 717 } else { |
703 NPC = EPC; | 718 pc.npc(EPC); |
704 // Need to adjust NNPC, otherwise things break | 719 // Need to adjust NNPC, otherwise things break |
705 NNPC = EPC + sizeof(MachInst); | 720 pc.nnpc(EPC + sizeof(MachInst)); |
706 status.exl = 0; 707 if (config.ar >=1 && 708 srsCtl.hss > 0 && 709 status.bev == 0) { 710 srsCtl.css = srsCtl.pss; 711 //xc->setShadowSet(srsCtl.pss); 712 } 713 } | 721 status.exl = 0; 722 if (config.ar >=1 && 723 srsCtl.hss > 0 && 724 status.bev == 0) { 725 srsCtl.css = srsCtl.pss; 726 //xc->setShadowSet(srsCtl.pss); 727 } 728 } |
729 PCS = pc; |
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714 LLFlag = 0; 715 Status = status; 716 SRSCtl = srsCtl; 717 }}, IsReturn, IsSerializing, IsERET); 718 719 0x1F: deret({{ 720 DebugReg debug = Debug; | 730 LLFlag = 0; 731 Status = status; 732 SRSCtl = srsCtl; 733 }}, IsReturn, IsSerializing, IsERET); 734 735 0x1F: deret({{ 736 DebugReg debug = Debug; |
737 MipsISA::PCState pc = PCS; |
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721 if (debug.dm == 1) { 722 debug.dm = 1; 723 debug.iexi = 0; | 738 if (debug.dm == 1) { 739 debug.dm = 1; 740 debug.iexi = 0; |
724 NPC = DEPC; | 741 pc.npc(DEPC); |
725 } else { 726 // Undefined; 727 } | 742 } else { 743 // Undefined; 744 } |
745 PCS = pc; |
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728 Debug = debug; 729 }}, IsReturn, IsSerializing, IsERET); 730 } 731 format CP0TLB { 732 0x01: tlbr({{ 733 MipsISA::PTE *PTEntry = 734 xc->tcBase()->getITBPtr()-> 735 getEntry(Index & 0x7FFFFFFF); --- 1834 unchanged lines hidden --- | 746 Debug = debug; 747 }}, IsReturn, IsSerializing, IsERET); 748 } 749 format CP0TLB { 750 0x01: tlbr({{ 751 MipsISA::PTE *PTEntry = 752 xc->tcBase()->getITBPtr()-> 753 getEntry(Index & 0x7FFFFFFF); --- 1834 unchanged lines hidden --- |