decoder.isa (4056:f8f1dffc5913) decoder.isa (4172:141705d83494)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2006 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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284 }
285 }
286
287 0x2: decode OPCODE_LO {
288 //Table A-11 MIPS32 COP0 Encoding of rs Field
289 0x0: decode RS_MSB {
290 0x0: decode RS {
291 format CP0Control {
1// -*- mode:c++ -*-
2
3// Copyright (c) 2006 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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284 }
285 }
286
287 0x2: decode OPCODE_LO {
288 //Table A-11 MIPS32 COP0 Encoding of rs Field
289 0x0: decode RS_MSB {
290 0x0: decode RS {
291 format CP0Control {
292 0x0: mfc0({{ Rt = xc->readMiscReg(RD << 5 | SEL); }});
293 0x4: mtc0({{ xc->setMiscReg(RD << 5 | SEL, Rt); }});
292 0x0: mfc0({{ Rt = xc->readMiscRegNoEffect(RD << 5 | SEL); }});
293 0x4: mtc0({{ xc->setMiscRegNoEffect(RD << 5 | SEL, Rt); }});
294 }
295
296 format MipsMT {
297 0x8: mftr();
298 0xC: mttr();
299 0xB: decode RD {
300 0x0: decode SC {
301 0x0: dvpe();

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295
296 format MipsMT {
297 0x8: mftr();
298 0xC: mttr();
299 0xB: decode RD {
300 0x0: decode SC {
301 0x0: dvpe();

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