1// -*- mode:c++ -*- 2 3// Copyright (c) 2007 MIPS Technologies, Inc. 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 200 unchanged lines hidden (view full) --- 209 0x4: decode HINT { 210 0x0: decode FUNCTION_LO { 211 format IntOp { 212 0x0: add({{ 213 IntReg result; 214 Rd = result = Rs + Rt; 215 if (FULL_SYSTEM && 216 findOverflow(32, result, Rs, Rt)) { |
217 fault = new IntegerOverflowFault(); |
218 } 219 }}); 220 0x1: addu({{ Rd.sw = Rs.sw + Rt.sw;}}); 221 0x2: sub({{ 222 IntReg result; 223 Rd = result = Rs - Rt; 224 if (FULL_SYSTEM && 225 findOverflow(32, result, Rs, ~Rt)) { |
226 fault = new IntegerOverflowFault(); |
227 } 228 }}); 229 0x3: subu({{ Rd.sw = Rs.sw - Rt.sw; }}); 230 0x4: and({{ Rd = Rs & Rt; }}); 231 0x5: or({{ Rd = Rs | Rt; }}); 232 0x6: xor({{ Rd = Rs ^ Rt; }}); 233 0x7: nor({{ Rd = ~(Rs | Rt); }}); 234 } --- 87 unchanged lines hidden (view full) --- 322 323 0x1: decode OPCODE_LO { 324 format IntImmOp { 325 0x0: addi({{ 326 IntReg result; 327 Rt = result = Rs + imm; 328 if (FULL_SYSTEM && 329 findOverflow(32, result, Rs, imm)) { |
330 fault = new IntegerOverflowFault(); |
331 } 332 }}); 333 0x1: addiu({{ Rt.sw = Rs.sw + imm; }}); 334 0x2: slti({{ Rt.sw = (Rs.sw < imm) ? 1 : 0 }}); 335 0x3: sltiu({{ Rt.uw = (Rs.uw < (uint32_t)sextImm) ? 1 : 0;}}); 336 0x4: andi({{ Rt.sw = Rs.sw & zextImm; }}); 337 0x5: ori({{ Rt.sw = Rs.sw | zextImm; }}); 338 0x6: xori({{ Rt.sw = Rs.sw ^ zextImm; }}); --- 2185 unchanged lines hidden --- |