1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 MIPS Technologies, Inc.
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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158 NNPC = Rs;
159 }}, IsCall);
160 }
161 }
162
163 format BasicOp {
164 0x2: movz({{ Rd = (Rt == 0) ? Rs : Rd; }});
165 0x3: movn({{ Rd = (Rt != 0) ? Rs : Rd; }});
166#if FULL_SYSTEM
167 0x4: syscall({{ fault = new SystemCallFault(); }});
168#else
169 0x4: syscall({{ xc->syscall(R2); }},
170 IsSerializeAfter, IsNonSpeculative);
171#endif
172 0x7: sync({{ ; }}, IsMemBarrier);
173 0x5: break({{fault = new BreakpointFault();}});
174 }
175
176 }
177
178 0x2: decode FUNCTION_LO {
179 0x0: HiLoRsSelOp::mfhi({{ Rd = HI_RS_SEL; }},

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206 }}, IntDivOp);
207 }
208 }
209
210 0x4: decode HINT {
211 0x0: decode FUNCTION_LO {
212 format IntOp {
213 0x0: add({{
214 /* More complicated since an ADD can cause
215 an arithmetic overflow exception */
216 int64_t Src1 = Rs.sw;
217 int64_t Src2 = Rt.sw;
218 int64_t temp_result;
219#if FULL_SYSTEM
220 if (((Src1 >> 31) & 1) == 1)
221 Src1 |= 0x100000000LL;
222#endif
223 temp_result = Src1 + Src2;
224#if FULL_SYSTEM
225 if (bits(temp_result, 31) ==
226 bits(temp_result, 32)) {
227#endif
228 Rd.sw = temp_result;
229#if FULL_SYSTEM
230 } else {
231 fault = new ArithmeticFault();
232 }
233#endif
234 }});
235 0x1: addu({{ Rd.sw = Rs.sw + Rt.sw;}});
236 0x2: sub({{
237 /* More complicated since an SUB can cause
238 an arithmetic overflow exception */
239 int64_t Src1 = Rs.sw;
240 int64_t Src2 = Rt.sw;
241 int64_t temp_result = Src1 - Src2;
242#if FULL_SYSTEM
243 if (bits(temp_result, 31) ==
244 bits(temp_result, 32)) {
245#endif
246 Rd.sw = temp_result;
247#if FULL_SYSTEM
248 } else {
249 fault = new ArithmeticFault();
250 }
251#endif
252 }});
253 0x3: subu({{ Rd.sw = Rs.sw - Rt.sw; }});
254 0x4: and({{ Rd = Rs & Rt; }});
255 0x5: or({{ Rd = Rs | Rt; }});
256 0x6: xor({{ Rd = Rs ^ Rt; }});
257 0x7: nor({{ Rd = ~(Rs | Rt); }});
258 }
259 }

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342 0x6: blez({{ cond = (Rs.sw <= 0); }});
343 0x7: bgtz({{ cond = (Rs.sw > 0); }});
344 }
345 }
346
347 0x1: decode OPCODE_LO {
348 format IntImmOp {
349 0x0: addi({{
350 int64_t Src1 = Rs.sw;
351 int64_t Src2 = imm;
352 int64_t temp_result;
353#if FULL_SYSTEM
354 if (((Src1 >> 31) & 1) == 1)
355 Src1 |= 0x100000000LL;
356#endif
357 temp_result = Src1 + Src2;
358#if FULL_SYSTEM
359 if (bits(temp_result, 31) == bits(temp_result, 32)) {
360#endif
361 Rt.sw = temp_result;
362#if FULL_SYSTEM
363 } else {
364 fault = new ArithmeticFault();
365 }
366#endif
367 }});
368 0x1: addiu({{ Rt.sw = Rs.sw + imm; }});
369 0x2: slti({{ Rt.sw = (Rs.sw < imm) ? 1 : 0 }});
370 0x3: sltiu({{ Rt.uw = (Rs.uw < (uint32_t)sextImm) ? 1 : 0;}});
371 0x4: andi({{ Rt.sw = Rs.sw & zextImm; }});
372 0x5: ori({{ Rt.sw = Rs.sw | zextImm; }});
373 0x6: xori({{ Rt.sw = Rs.sw ^ zextImm; }});
374

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1511 0x7: Prefetch::prefx({{ EA = Rs + Rt; }});
1512 }
1513
1514 0x3: decode FUNCTION_LO {
1515 0x6: Float64Op::alnv_ps({{
1516 if (Rs<2:0> == 0) {
1517 Fd.ud = Fs.ud;
1518 } else if (Rs<2:0> == 4) {
1519#if BYTE_ORDER == BIG_ENDIAN
1520 Fd.ud = Fs.ud<31:0> << 32 | Ft.ud<63:32>;
1521#elif BYTE_ORDER == LITTLE_ENDIAN
1522 Fd.ud = Ft.ud<31:0> << 32 | Fs.ud<63:32>;
1523#endif
1524 } else {
1525 Fd.ud = Fd.ud;
1526 }
1527 }});
1528 }
1529
1530 format FloatAccOp {
1531 0x4: decode FUNCTION_LO {

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2463 dspac = dspac << 32;
2464 dspac |= Rs.uw;
2465 dspctl = insertBits(dspctl, 5, 0,
2466 dspctl<5:0> + 32);
2467 }});
2468 }
2469 }
2470 }
2471 0x3: decode OP {
2472#if FULL_SYSTEM
2473 0x0: FailUnimpl::rdhwr();
2474#else
2475 0x0: decode RD {
2476 29: BasicOp::rdhwr({{ Rt = TpValue; }});
2477 }
2478#endif
2479 }
2480 }
2481 }
2482 }
2483
2484 0x4: decode OPCODE_LO {
2485 format LoadMemory {
2486 0x0: lb({{ Rt.sw = Mem.sb; }});

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