1// -*- mode:c++ -*-
2
3// Copyright (c) 2006 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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30
31////////////////////////////////////////////////////////////////////
32//
33// The actual MIPS32 ISA decoder
34// -----------------------------
35// The following instructions are specified in the MIPS32 ISA
36// Specification. Decoding closely follows the style specified
37// in the MIPS32 ISA specification document starting with Table
38// A-2 (document available @ www.mips.com)
39//
40decode OPCODE_HI default Unknown::unknown() {
41 //Table A-2
42 0x0: decode OPCODE_LO {
43 0x0: decode FUNCTION_HI {
44 0x0: decode FUNCTION_LO {
45 0x1: decode MOVCI {
46 format BasicOp {
47 0: movf({{ Rd = (getCondCode(FCSR, CC) == 0) ? Rd : Rs; }});
48 1: movt({{ Rd = (getCondCode(FCSR, CC) == 1) ? Rd : Rs; }});
49 }
50 }
51
52 format BasicOp {
53 //Table A-3 Note: "Specific encodings of the rd, rs, and
54 //rt fields are used to distinguish SLL, SSNOP, and EHB
55 //functions
56 0x0: decode RS {
57 0x0: decode RT_RD {
58 0x0: decode SA default Nop::nop(){
59 0x1: WarnUnimpl::ssnop();
60 0x3: WarnUnimpl::ehb();
61 }
62 default: sll({{ Rd = Rt.uw << SA; }});
63 }
64 }
65
66 0x2: decode RS_SRL {

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118 //used to distinguish JR from JR.HB and JALR from JALR.HB"
119 format Jump {
120 0x0: decode HINT {
121 0x1: jr_hb({{ NNPC = Rs & ~1; }}, IsReturn, ClearHazards);
122 default: jr({{ NNPC = Rs & ~1; }}, IsReturn);
123 }
124
125 0x1: decode HINT {
126 0x1: jalr_hb({{ Rd = NNPC; NNPC = Rs; }}, IsCall, Link
127 , ClearHazards);
128 default: jalr({{ Rd = NNPC; NNPC = Rs; }}, IsCall,
129 Link);
130 }
131 }
132
133 format BasicOp {
134 0x2: movz({{ Rd = (Rt == 0) ? Rs : Rd; }});
135 0x3: movn({{ Rd = (Rt != 0) ? Rs : Rd; }});
136 0x4: syscall({{ xc->syscall(R2); }},
137 IsSerializeAfter, IsNonSpeculative);
138 0x7: sync({{ ; }}, IsMemBarrier);
139 }
140
141 format FailUnimpl {
142 0x5: break();
143 }
144 }
145
146 0x2: decode FUNCTION_LO {
147 format HiLoMiscOp {
148 0x0: mfhi({{ Rd = HI; }});
149 0x1: mthi({{ HI = Rs; }});
150 0x2: mflo({{ Rd = LO; }});
151 0x3: mtlo({{ LO = Rs; }});
152 }
153 }
154
155 0x3: decode FUNCTION_LO {
156 format HiLoOp {
157 0x0: mult({{ int64_t val = Rs.sd * Rt.sd; }});
158 0x1: multu({{ uint64_t val = Rs.ud * Rt.ud; }});
159 0x2: div({{ //Initialized to placate g++
160 int64_t val = 0;
161 if (Rt.sd != 0) {
162 int64_t hi = Rs.sd % Rt.sd;
163 int64_t lo = Rs.sd / Rt.sd;
164 val = (hi << 32) | lo;
165 }
166 }});
167 0x3: divu({{ //Initialized to placate g++
168 uint64_t val = 0;
169 if (Rt.ud != 0) {
170 uint64_t hi = Rs.ud % Rt.ud;
171 uint64_t lo = Rs.ud / Rt.ud;
172 val = (hi << 32) | lo;
173 }
174 }});
175 }
176 }
177
178 0x4: decode HINT {
179 0x0: decode FUNCTION_LO {
180 format IntOp {
181 0x0: add({{ Rd.sw = Rs.sw + Rt.sw; /*Trap on Overflow*/}});
182 0x1: addu({{ Rd.sw = Rs.sw + Rt.sw;}});

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240 default: bgezal({{ cond = (Rs.sw >= 0); }}, Link);
241 }
242 0x2: bltzall({{ cond = (Rs.sw < 0); }}, Link, Likely);
243 0x3: bgezall({{ cond = (Rs.sw >= 0); }}, Link, Likely);
244 }
245 }
246
247 0x3: decode REGIMM_LO {
248 format WarnUnimpl {
249 0x7: synci();
250 }
251 }
252 }
253
254 format Jump {
255 0x2: j({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2);}});

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268 }
269 }
270
271 0x1: decode OPCODE_LO {
272 format IntImmOp {
273 0x0: addi({{ Rt.sw = Rs.sw + imm; /*Trap If Overflow*/}});
274 0x1: addiu({{ Rt.sw = Rs.sw + imm;}});
275 0x2: slti({{ Rt.sw = ( Rs.sw < imm) ? 1 : 0 }});
276 0x3: sltiu({{ Rt.uw = ( Rs.uw < (uint32_t)sextImm ) ? 1 : 0 }});
277 0x4: andi({{ Rt.sw = Rs.sw & zextImm;}});
278 0x5: ori({{ Rt.sw = Rs.sw | zextImm;}});
279 0x6: xori({{ Rt.sw = Rs.sw ^ zextImm;}});
280
281 0x7: decode RS {
282 0x0: lui({{ Rt = imm << 16}});
283 }
284 }
285 }
286
287 0x2: decode OPCODE_LO {
288 //Table A-11 MIPS32 COP0 Encoding of rs Field
289 0x0: decode RS_MSB {
290 0x0: decode RS {
291 format CP0Control {
292 0x0: mfc0({{ Rt = xc->readMiscRegNoEffect(RD << 5 | SEL); }});
293 0x4: mtc0({{ xc->setMiscRegNoEffect(RD << 5 | SEL, Rt); }});
294 }
295
296 format MipsMT {
297 0x8: mftr();
298 0xC: mttr();
299 0xB: decode RD {
300 0x0: decode SC {
301 0x0: dvpe();
302 0x1: evpe();
303 }
304 0x1: decode SC {
305 0x0: dmt();
306 0x1: emt();
307 0xC: decode SC {
308 0x0: di();
309 0x1: ei();
310 }
311 }
312 }
313 }
314
315 format FailUnimpl {
316 0xA: rdpgpr();
317 0xE: wrpgpr();
318 }
319 }
320
321 //Table A-12 MIPS32 COP0 Encoding of Function Field When rs=CO
322 0x1: decode FUNCTION {
323 format FailUnimpl {
324 0x01: tlbr();
325 0x02: tlbwi();
326 0x06: tlbwr();
327 0x08: tlbp();
328
329 0x18: eret();
330 0x1F: deret();
331 0x20: wait();
332 }
333 }
334 }
335
336 //Table A-13 MIPS32 COP1 Encoding of rs Field
337 0x1: decode RS_MSB {
338
339 0x0: decode RS_HI {
340 0x0: decode RS_LO {

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944 }
945 }
946
947 0x3: decode OPCODE_LO {
948 //Table A-5 MIPS32 SPECIAL2 Encoding of Function Field
949 0x4: decode FUNCTION_HI {
950 0x0: decode FUNCTION_LO {
951 0x2: IntOp::mul({{ int64_t temp1 = Rs.sd * Rt.sd;
952 Rd.sw = temp1<31:0>
953 }});
954
955 format HiLoOp {
956 0x0: madd({{ int64_t val = ((int64_t) HI << 32 | LO) +
957 (Rs.sd * Rt.sd);
958 }});
959 0x1: maddu({{ uint64_t val = ((uint64_t) HI << 32 | LO) +
960 (Rs.ud * Rt.ud);
961 }});
962 0x4: msub({{ int64_t val = ((int64_t) HI << 32 | LO) -
963 (Rs.sd * Rt.sd);
964 }});
965 0x5: msubu({{ uint64_t val = ((uint64_t) HI << 32 | LO) -
966 (Rs.ud * Rt.ud);
967 }});
968 }
969 }
970
971 0x4: decode FUNCTION_LO {
972 format BasicOp {
973 0x0: clz({{ int cnt = 32;
974 for (int idx = 31; idx >= 0; idx--) {
975 if( Rs<idx:idx> == 1) {
976 cnt = 31 - idx;
977 break;
978 }
979 }
980 Rd.uw = cnt;
981 }});
982 0x1: clo({{ int cnt = 32;
983 for (int idx = 31; idx >= 0; idx--) {
984 if( Rs<idx:idx> == 0) {
985 cnt = 31 - idx;
986 break;
987 }
988 }
989 Rd.uw = cnt;
990 }});
991 }
992 }
993
994 0x7: decode FUNCTION_LO {
995 0x7: FailUnimpl::sdbbp();
996 }
997 }
998

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1005 0x4: ins({{ Rt.uw = bits(Rt.uw, 31, MSB+1) << (MSB+1) |
1006 bits(Rs.uw, MSB-LSB, 0) << LSB |
1007 bits(Rt.uw, LSB-1, 0);
1008 }});
1009 }
1010 }
1011
1012 0x1: decode FUNCTION_LO {
1013 format MipsMT {
1014 0x0: fork();
1015 0x1: yield();
1016 }
1017 }
1018
1019 //Table A-10 MIPS32 BSHFL Encoding of sa Field
1020 0x4: decode SA {
1021 format BasicOp {
1022 0x02: wsbh({{ Rd.uw = Rt.uw<23:16> << 24 |
1023 Rt.uw<31:24> << 16 |
1024 Rt.uw<7:0> << 8 |
1025 Rt.uw<15:8>;
1026 }});
1027 0x10: seb({{ Rd.sw = Rt.sb; }});
1028 0x18: seh({{ Rd.sw = Rt.sh; }});
1029 }
1030 }
1031
1032 0x6: decode FUNCTION_LO {
1033 0x7: FailUnimpl::rdhwr();
1034 }
1035 }
1036 }
1037
1038 0x4: decode OPCODE_LO {
1039 format LoadMemory {
1040 0x0: lb({{ Rt.sw = Mem.sb; }});
1041 0x1: lh({{ Rt.sw = Mem.sh; }});
1042 0x3: lw({{ Rt.sw = Mem.sw; }});
1043 0x4: lbu({{ Rt.uw = Mem.ub; }});
1044 0x5: lhu({{ Rt.uw = Mem.uh; }});
1045 }
1046
1047 format LoadUnalignedMemory {
1048 0x2: lwl({{ uint32_t mem_shift = 24 - (8 * byte_offset);
1049 Rt.uw = mem_word << mem_shift |
1050 Rt.uw & mask(mem_shift);
1051 }});
1052 0x6: lwr({{ uint32_t mem_shift = 8 * byte_offset;
1053 Rt.uw = Rt.uw & (mask(mem_shift) << (32 - mem_shift)) |
1054 mem_word >> mem_shift;
1055 }});
1056 }
1057 }
1058
1059 0x5: decode OPCODE_LO {
1060 format StoreMemory {
1061 0x0: sb({{ Mem.ub = Rt<7:0>; }});
1062 0x1: sh({{ Mem.uh = Rt<15:0>; }});
1063 0x3: sw({{ Mem.uw = Rt<31:0>; }});
1064 }

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1088 0x3: Prefetch::pref();
1089 }
1090
1091
1092 0x7: decode OPCODE_LO {
1093 0x0: StoreCond::sc({{ Mem.uw = Rt.uw;}},
1094 {{ uint64_t tmp = write_result;
1095 Rt.uw = (tmp == 0 || tmp == 1) ? tmp : Rt.uw;
1096 if (tmp == 1) {
1097 xc->setStCondFailures(0);
1098 }
1099 }}, mem_flags=LOCKED, inst_flags = IsStoreConditional);
1100
1101 format StoreMemory {
1102 0x1: swc1({{ Mem.uw = Ft.uw; }});
1103 0x5: sdc1({{ Mem.ud = Ft.ud; }});
1104 }
1105 }
1106}
1107
1108