isa.hh (7878:d3e6ebcccabf) | isa.hh (8181:f789b9aac5f4) |
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1/* 2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 40 unchanged lines hidden (view full) --- 49{ 50 class ISA 51 { 52 public: 53 // The MIPS name for this file is CP0 or Coprocessor 0 54 typedef ISA CP0; 55 56 protected: | 1/* 2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 40 unchanged lines hidden (view full) --- 49{ 50 class ISA 51 { 52 public: 53 // The MIPS name for this file is CP0 or Coprocessor 0 54 typedef ISA CP0; 55 56 protected: |
57 // Number of threads and vpes an individual ISA state can handle 58 uint8_t numThreads; 59 uint8_t numVpes; 60 |
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57 enum BankType { 58 perProcessor, 59 perThreadContext, 60 perVirtProcessor 61 }; 62 63 std::vector<std::vector<MiscReg> > miscRegFile; 64 std::vector<std::vector<MiscReg> > miscRegFile_WriteMask; 65 std::vector<BankType> bankType; 66 67 public: | 61 enum BankType { 62 perProcessor, 63 perThreadContext, 64 perVirtProcessor 65 }; 66 67 std::vector<std::vector<MiscReg> > miscRegFile; 68 std::vector<std::vector<MiscReg> > miscRegFile_WriteMask; 69 std::vector<BankType> bankType; 70 71 public: |
68 ISA(); | 72 ISA(uint8_t num_threads = 1, uint8_t num_vpes = 1); |
69 | 73 |
70 void init(); | 74 void clear(); |
71 | 75 |
72 void clear(unsigned tid_or_vpn = 0); | 76 void configCP(); |
73 | 77 |
74 void reset(std::string core_name, ThreadID num_threads, 75 unsigned num_vpes, BaseCPU *cpu); 76 77 void expandForMultithreading(ThreadID num_threads, unsigned num_vpes); 78 | |
79 unsigned getVPENum(ThreadID tid); 80 81 ////////////////////////////////////////////////////////// 82 // 83 // READ/WRITE CP0 STATE 84 // 85 // 86 ////////////////////////////////////////////////////////// --- 94 unchanged lines hidden --- | 78 unsigned getVPENum(ThreadID tid); 79 80 ////////////////////////////////////////////////////////// 81 // 82 // READ/WRITE CP0 STATE 83 // 84 // 85 ////////////////////////////////////////////////////////// --- 94 unchanged lines hidden --- |