isa.cc (9180:ee8d7a51651d) isa.cc (9384:877293183bdf)
1/*
2 * Copyright (c) 2009 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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31#include "arch/mips/isa.hh"
32#include "arch/mips/mt.hh"
33#include "arch/mips/mt_constants.hh"
34#include "arch/mips/pra_constants.hh"
35#include "base/bitfield.hh"
36#include "cpu/base.hh"
37#include "cpu/thread_context.hh"
38#include "debug/MipsPRA.hh"
1/*
2 * Copyright (c) 2009 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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31#include "arch/mips/isa.hh"
32#include "arch/mips/mt.hh"
33#include "arch/mips/mt_constants.hh"
34#include "arch/mips/pra_constants.hh"
35#include "base/bitfield.hh"
36#include "cpu/base.hh"
37#include "cpu/thread_context.hh"
38#include "debug/MipsPRA.hh"
39#include "params/MipsISA.hh"
39
40namespace MipsISA
41{
42
43std::string
44ISA::miscRegNames[NumMiscRegs] =
45{
46 "Index", "MVPControl", "MVPConf0", "MVPConf1", "", "", "", "",

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82 "TagLo4", "DataLo5", "TagLo6", "DataLo7",
83 "TagHi0", "DataHi1", "TagHi2", "DataHi3",
84 "TagHi4", "DataHi5", "TagHi6", "DataHi7",
85 "ErrorEPC", "", "", "", "", "", "", "",
86 "DESAVE", "", "", "", "", "", "", "",
87 "LLFlag"
88};
89
40
41namespace MipsISA
42{
43
44std::string
45ISA::miscRegNames[NumMiscRegs] =
46{
47 "Index", "MVPControl", "MVPConf0", "MVPConf1", "", "", "", "",

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83 "TagLo4", "DataLo5", "TagLo6", "DataLo7",
84 "TagHi0", "DataHi1", "TagHi2", "DataHi3",
85 "TagHi4", "DataHi5", "TagHi6", "DataHi7",
86 "ErrorEPC", "", "", "", "", "", "", "",
87 "DESAVE", "", "", "", "", "", "", "",
88 "LLFlag"
89};
90
90ISA::ISA(uint8_t num_threads, uint8_t num_vpes)
91ISA::ISA(Params *p)
92 : SimObject(p),
93 numThreads(p->num_threads), numVpes(p->num_vpes)
91{
94{
92 numThreads = num_threads;
93 numVpes = num_vpes;
94
95 miscRegFile.resize(NumMiscRegs);
96 bankType.resize(NumMiscRegs);
97
98 for (int i=0; i < NumMiscRegs; i++) {
99 miscRegFile[i].resize(1);
100 bankType[i] = perProcessor;
101 }
102

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137 for (int i = 0; i < num_tc_regs; i++) {
138 miscRegFile[per_tc_regs[i]].resize(numThreads);
139 bankType[per_tc_regs[i]] = perThreadContext;
140 }
141
142 clear();
143}
144
95 miscRegFile.resize(NumMiscRegs);
96 bankType.resize(NumMiscRegs);
97
98 for (int i=0; i < NumMiscRegs; i++) {
99 miscRegFile[i].resize(1);
100 bankType[i] = perProcessor;
101 }
102

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137 for (int i = 0; i < num_tc_regs; i++) {
138 miscRegFile[per_tc_regs[i]].resize(numThreads);
139 bankType[per_tc_regs[i]] = perThreadContext;
140 }
141
142 clear();
143}
144
145const MipsISAParams *
146ISA::params() const
147{
148 return dynamic_cast<const Params *>(_params);
149}
150
145void
146ISA::clear()
147{
148 for(int i = 0; i < NumMiscRegs; i++) {
149 for (int j = 0; j < miscRegFile[i].size(); j++)
150 miscRegFile[i][j] = 0;
151
152 for (int k = 0; k < miscRegFile_WriteMask[i].size(); k++)

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581void
582ISA::CP0Event::unscheduleEvent()
583{
584 if (scheduled())
585 squash();
586}
587
588}
151void
152ISA::clear()
153{
154 for(int i = 0; i < NumMiscRegs; i++) {
155 for (int j = 0; j < miscRegFile[i].size(); j++)
156 miscRegFile[i][j] = 0;
157
158 for (int k = 0; k < miscRegFile_WriteMask[i].size(); k++)

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587void
588ISA::CP0Event::unscheduleEvent()
589{
590 if (scheduled())
591 squash();
592}
593
594}
595
596MipsISA::ISA *
597MipsISAParams::create()
598{
599 return new MipsISA::ISA(this);
600}