1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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29 * Authors: Gabe Black
30 * Korey Sewell
31 * Jaidev Patwardhan
32 */
33
34#ifndef __MIPS_FAULTS_HH__
35#define __MIPS_FAULTS_HH__
36
37#include "sim/faults.hh"
38
39namespace MipsISA
40{
41
42typedef const Addr FaultVect;
43
44class MipsFaultBase : public FaultBase
45{
46 protected:
47 virtual bool skipFaultingInstruction() {return false;}
48 virtual bool setRestartAddress() {return true;}
49 public:
50 struct FaultVals
51 {
52 const FaultName name;
53 const FaultVect vect;
54 };
55
56 Addr badVAddr;
57 Addr entryHiAsid;
58 Addr entryHiVPN2;
59 Addr entryHiVPN2X;
60 Addr contextBadVPN2;
61#if FULL_SYSTEM
62 void invoke(ThreadContext * tc,
63 StaticInst::StaticInstPtr inst = StaticInst::nullStaticInstPtr)
64 {}
65 void setHandlerPC(Addr, ThreadContext *);
66#endif
67 void setExceptionState(ThreadContext *, uint8_t);
68};
69
70template <typename T>
71class MipsFault : public MipsFaultBase
72{
73 protected:
74 static FaultVals vals;
75 public:
76 FaultName name() const { return vals.name; }
77 FaultVect vect() const { return vals.vect; }
78};
79
80class MachineCheckFault : public MipsFault<MachineCheckFault>
81{
82 public:
83 bool isMachineCheckFault() {return true;}
84};
85
86static inline Fault genMachineCheckFault()
87{
88 return new MachineCheckFault;
89}
90
91class NonMaskableInterrupt : public MipsFault<NonMaskableInterrupt>
92{
93 public:
94 bool isNonMaskableInterrupt() {return true;}
95};
96
97class AddressErrorFault : public MipsFault<AddressErrorFault>
98{
99 protected:
100 Addr vaddr;
101 bool store;
102 public:
103 AddressErrorFault(Addr _vaddr, bool _store) : vaddr(_vaddr), store(_store)
104 {}
105#if FULL_SYSTEM
106 void invoke(ThreadContext * tc,
107 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
108#endif
109
110};
111

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194{
195 public:
196#if FULL_SYSTEM
197 void invoke(ThreadContext * tc,
198 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
199#endif
200};
201
202class TlbRefillFault : public MipsFault<TlbRefillFault>
203{
204 protected:
205 bool store;
206 public:
207 TlbRefillFault(Addr asid, Addr vaddr, Addr vpn, bool _store) :
208 store(_store)
209 {
210 entryHiAsid = asid;
211 entryHiVPN2 = vpn >> 2;
212 entryHiVPN2X = vpn & 0x3;
213 badVAddr = vaddr;
214 contextBadVPN2 = vpn >> 2;
215 }
216#if FULL_SYSTEM
217 void invoke(ThreadContext * tc,
218 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
219#endif
220};
221
222class TlbInvalidFault : public MipsFault<TlbInvalidFault>
223{
224 protected:
225 bool store;
226 public:
227 TlbInvalidFault(Addr asid, Addr vaddr, Addr vpn, bool _store) :
228 store(_store)
229 {
230 entryHiAsid = asid;
231 entryHiVPN2 = vpn >> 2;
232 entryHiVPN2X = vpn & 0x3;
233 badVAddr = vaddr;
234 contextBadVPN2 = vpn >> 2;
235 }
236#if FULL_SYSTEM
237 void invoke(ThreadContext * tc,
238 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
239#endif
240};
241
242class TLBModifiedFault : public MipsFault<TLBModifiedFault>
243{
244 public:
245 TLBModifiedFault(Addr asid, Addr vaddr, Addr vpn)
246 {
247 entryHiAsid = asid;
248 entryHiVPN2 = vpn >> 2;
249 entryHiVPN2X = vpn & 0x3;
250 badVAddr = vaddr;
251 contextBadVPN2 = vpn >> 2;
252 }
253#if FULL_SYSTEM
254 void invoke(ThreadContext * tc,
255 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
256#endif
257};
258
259class DspStateDisabledFault : public MipsFault<DspStateDisabledFault>
260{
261 public:
262 void invoke(ThreadContext * tc,
263 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
264};
265
266} // namespace MipsISA
267
268#endif // __MIPS_FAULTS_HH__