1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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88class NonMaskableInterrupt : public MipsFault<NonMaskableInterrupt>
89{
90 public:
91 bool isNonMaskableInterrupt() {return true;}
92};
93
94class AddressErrorFault : public MipsFault<AddressErrorFault>
95{
96 public:
97 AddressErrorFault(Addr vaddr) { badVAddr = vaddr; }
98#if FULL_SYSTEM
99 void invoke(ThreadContext * tc,
100 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
101#endif
102
103};
104
105class StoreAddressErrorFault : public MipsFault<StoreAddressErrorFault>
106{
107 public:
108 StoreAddressErrorFault(Addr vaddr) { badVAddr = vaddr; }
109#if FULL_SYSTEM
110 void invoke(ThreadContext * tc,
111 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
112#endif
113};
114
115static inline Fault genMachineCheckFault()
116{
117 return new MachineCheckFault;
118}
119
120class ResetFault : public MipsFault<ResetFault>
121{
122 public:

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