100d99
< #if FULL_SYSTEM
102,109d100
< MipsFaultBase::setHandlerPC(Addr HandlerBase, ThreadContext *tc)
< {
< tc->setPC(HandlerBase);
< tc->setNextPC(HandlerBase + sizeof(MachInst));
< tc->setNextNPC(HandlerBase + 2 * sizeof(MachInst));
< }
<
< void
127,140c118,122
< // CHECK ME or FIXME or FIX ME or POSSIBLE HACK
< // Check to see if the exception occurred in the branch delay slot
< DPRINTF(MipsPRA, "PC: %x, NextPC: %x, NNPC: %x\n",
< tc->readPC(), tc->readNextPC(), tc->readNextNPC());
< int bd = 0;
< if (tc->readPC() + sizeof(MachInst) != tc->readNextPC()) {
< tc->setMiscRegNoEffect(MISCREG_EPC, tc->readPC() - sizeof(MachInst));
< // In the branch delay slot? set CAUSE_31
< bd = 1;
< } else {
< tc->setMiscRegNoEffect(MISCREG_EPC, tc->readPC());
< // In the branch delay slot? reset CAUSE_31
< bd = 0;
< }
---
> PCState pc = tc->pcState();
> DPRINTF(MipsPRA, "PC: %s\n", pc);
> bool delay_slot = pc.pc() + sizeof(MachInst) != pc.npc();
> tc->setMiscRegNoEffect(MISCREG_EPC,
> pc.pc() - delay_slot ? sizeof(MachInst) : 0);
145c127
< cause.bd = bd;
---
> cause.bd = delay_slot ? 1 : 0;
149a132
> #if FULL_SYSTEM
150a134,141
> MipsFaultBase::setHandlerPC(Addr HandlerBase, ThreadContext *tc)
> {
> tc->setPC(HandlerBase);
> tc->setNextPC(HandlerBase + sizeof(MachInst));
> tc->setNextNPC(HandlerBase + 2 * sizeof(MachInst));
> }
>
> void