1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Korey Sewell
30 */
31
32#include "arch/mips/faults.hh"
33#include "cpu/thread_context.hh"
34#include "cpu/base.hh"
35#include "base/trace.hh"
36
37#if !FULL_SYSTEM
38#include "sim/process.hh"
39#include "mem/page_table.hh"
40#endif
41
42namespace MipsISA
43{
44
45FaultName MachineCheckFault::_name = "Machine Check";
46FaultVect MachineCheckFault::_vect = 0x0401;
47FaultStat MachineCheckFault::_count;
48
49FaultName AlignmentFault::_name = "Alignment";
50FaultVect AlignmentFault::_vect = 0x0301;
51FaultStat AlignmentFault::_count;
52
53FaultName ResetFault::_name = "reset";
54FaultVect ResetFault::_vect = 0x0001;
55FaultStat ResetFault::_count;
56
57FaultName ArithmeticFault::_name = "arith";
58FaultVect ArithmeticFault::_vect = 0x0501;
59FaultStat ArithmeticFault::_count;
60
61FaultName InterruptFault::_name = "interrupt";
62FaultVect InterruptFault::_vect = 0x0101;
63FaultStat InterruptFault::_count;
64
65FaultName NDtbMissFault::_name = "dtb_miss_single";
66FaultVect NDtbMissFault::_vect = 0x0201;
67FaultStat NDtbMissFault::_count;
68
69FaultName PDtbMissFault::_name = "dtb_miss_double";
70FaultVect PDtbMissFault::_vect = 0x0281;
71FaultStat PDtbMissFault::_count;
72
73FaultName DtbPageFault::_name = "dfault";
74FaultVect DtbPageFault::_vect = 0x0381;
75FaultStat DtbPageFault::_count;
76
77FaultName DtbAcvFault::_name = "dfault";
78FaultVect DtbAcvFault::_vect = 0x0381;
79FaultStat DtbAcvFault::_count;
80
81FaultName ItbMissFault::_name = "itbmiss";
82FaultVect ItbMissFault::_vect = 0x0181;
83FaultStat ItbMissFault::_count;
84
85FaultName ItbPageFault::_name = "itbmiss";
86FaultVect ItbPageFault::_vect = 0x0181;
87FaultStat ItbPageFault::_count;
88
89FaultName ItbAcvFault::_name = "iaccvio";
90FaultVect ItbAcvFault::_vect = 0x0081;
91FaultStat ItbAcvFault::_count;
92
93FaultName UnimplementedOpcodeFault::_name = "opdec";
94FaultVect UnimplementedOpcodeFault::_vect = 0x0481;
95FaultStat UnimplementedOpcodeFault::_count;
96
97FaultName FloatEnableFault::_name = "fen";
98FaultVect FloatEnableFault::_vect = 0x0581;
99FaultStat FloatEnableFault::_count;
100
101FaultName PalFault::_name = "pal";
102FaultVect PalFault::_vect = 0x2001;
103FaultStat PalFault::_count;
104
105FaultName IntegerOverflowFault::_name = "intover";
106FaultVect IntegerOverflowFault::_vect = 0x0501;
107FaultStat IntegerOverflowFault::_count;
108
109} // namespace MipsISA
110