1/*
2 * Copyright (c) 2007 MIPS Technologies, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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27 *
28 * Authors: Jaidev Patwardhan
29 */
30
31#ifndef __ARCH_MIPS_DT_CONSTANTS_HH__
32#define __ARCH_MIPS_DT_CONSTANTS_HH__
33
34#include "arch/mips/types.hh"
35#include "base/bitunion.hh"
36
37namespace MipsISA
38{
39
40BitUnion32(DebugReg)
41 Bitfield<31> dbd;
42 Bitfield<30> dm;
43 Bitfield<29> nodcr;
44 Bitfield<28> lsnm;
45 Bitfield<27> doze;
46 Bitfield<26> halt;
47 Bitfield<25> conutdm;
48 Bitfield<24> ibusep;
49 Bitfield<23> mcheckep;
50 Bitfield<22> cacheep;
51 Bitfield<21> dbusep;
52 Bitfield<20, 19> iexi;
53 Bitfield<19> ddbsImpr;
54 Bitfield<18> ddblImpr;
55 SubBitUnion(ejtagVer, 17, 15)
56 Bitfield<17> ejtagVer2;
57 Bitfield<16> ejtagVer1;
58 Bitfield<15> ejtagVer0;
59 EndSubBitUnion(ejtagVer)
60 Bitfield<14, 10> dexcCode;
61 Bitfield<9> nosst;
62 Bitfield<8> sst;
63 Bitfield<7> offline;
64 Bitfield<6> dibimpr;
65 Bitfield<5> dint;
66 Bitfield<4> dib;
67 Bitfield<3> ddbs;
68 Bitfield<2> ddbl;
69 Bitfield<1> dbp;
70 Bitfield<0> dss;
71EndBitUnion(DebugReg)
72
73BitUnion32(TraceControlReg)
74 Bitfield<31> ts;
75 Bitfield<30> ut;
76 Bitfield<27> tb;
77 Bitfield<26> io;
78 Bitfield<25> d;
79 Bitfield<24> e;
80 Bitfield<23> k;
81 Bitfield<22> s;
82 Bitfield<21> u;
83 Bitfield<20, 13> asidM;
84 Bitfield<12, 5> asid;
85 Bitfield<4> g;
86 Bitfield<3> tfcr;
87 Bitfield<2> tlsm;
88 Bitfield<1> tim;
89 Bitfield<0> on;
90EndBitUnion(TraceControlReg)
91
92BitUnion32(TraceControl2Reg)
93 Bitfield<29> cpuidv;
94 Bitfield<28, 21> cpuid;
95 Bitfield<20> tcv;
96 Bitfield<19, 12> tcnum;
97 Bitfield<11, 7> mode;
98 Bitfield<6, 5> validModes;
99 Bitfield<4> tbi;
100 Bitfield<3> tbu;
101 Bitfield<2, 0> syp;
102EndBitUnion(TraceControl2Reg)
103
104BitUnion32(TraceBPCReg)
105 Bitfield<31> mb;
106 Bitfield<28> e;
107 Bitfield<27> ate;
108 Bitfield<26, 24> bpc8;
109 Bitfield<23, 21> bpc7;
110 Bitfield<20, 18> bpc6;
111 Bitfield<17, 15> bpc5;
112 Bitfield<14, 12> bpc4;
113 Bitfield<11, 9> bpc3;
114 Bitfield<8, 6> bpc2;
115 Bitfield<5, 3> bpc1;
116 Bitfield<2, 0> bpc0;
117EndBitUnion(TraceBPCReg)
118
119BitUnion32(TraceBPC2Reg)
120 Bitfield<17, 15> bpc14;
121 Bitfield<14, 12> bpc13;
122 Bitfield<11, 9> bpc12;
123 Bitfield<8, 6> bpc11;
124 Bitfield<5, 3> bpc10;
125 Bitfield<2, 0> bpc9;
126EndBitUnion(TraceBPC2Reg)
127
128BitUnion32(Debug2Reg)
129 Bitfield<3> prm;
130 Bitfield<2> dq;
131 Bitfield<1> tup;
132 Bitfield<0> paco;
133EndBitUnion(Debug2Reg)
134} // namespace MipsISA
135
136#endif