decoder.hh (9022:bb25e7646c41) decoder.hh (9023:e9201a7bce59)
1/*
2 * Copyright (c) 2012 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 17 unchanged lines hidden (view full) ---

26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_MIPS_DECODER_HH__
32#define __ARCH_MIPS_DECODER_HH__
33
1/*
2 * Copyright (c) 2012 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 17 unchanged lines hidden (view full) ---

26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_MIPS_DECODER_HH__
32#define __ARCH_MIPS_DECODER_HH__
33
34#include "arch/types.hh"
34#include "arch/mips/types.hh"
35#include "base/misc.hh"
36#include "base/types.hh"
35#include "cpu/decode_cache.hh"
36#include "cpu/static_inst_fwd.hh"
37
37#include "cpu/decode_cache.hh"
38#include "cpu/static_inst_fwd.hh"
39
40class ThreadContext;
41
38namespace MipsISA
39{
40
41class Decoder
42{
43 protected:
42namespace MipsISA
43{
44
45class Decoder
46{
47 protected:
48 ThreadContext * tc;
49 //The extended machine instruction being generated
50 ExtMachInst emi;
51 bool instDone;
52
53 public:
54 Decoder(ThreadContext * _tc) : tc(_tc), instDone(false)
55 {}
56
57 ThreadContext *getTC()
58 {
59 return tc;
60 }
61
62 void
63 setTC(ThreadContext *_tc)
64 {
65 tc = _tc;
66 }
67
68 void
69 process()
70 {
71 }
72
73 void
74 reset()
75 {
76 instDone = false;
77 }
78
79 //Use this to give data to the decoder. This should be used
80 //when there is control flow.
81 void
82 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
83 {
84 emi = inst;
85 instDone = true;
86 }
87
88 bool
89 needMoreBytes()
90 {
91 return true;
92 }
93
94 bool
95 instReady()
96 {
97 return instDone;
98 }
99
100 protected:
44 /// A cache of decoded instruction objects.
45 static DecodeCache defaultCache;
46
47 public:
48 StaticInstPtr decodeInst(ExtMachInst mach_inst);
49
50 /// Decode a machine instruction.
51 /// @param mach_inst The binary instruction to decode.
52 /// @retval A pointer to the corresponding StaticInst object.
53 StaticInstPtr
54 decode(ExtMachInst mach_inst, Addr addr)
55 {
56 return defaultCache.decode(this, mach_inst, addr);
57 }
101 /// A cache of decoded instruction objects.
102 static DecodeCache defaultCache;
103
104 public:
105 StaticInstPtr decodeInst(ExtMachInst mach_inst);
106
107 /// Decode a machine instruction.
108 /// @param mach_inst The binary instruction to decode.
109 /// @retval A pointer to the corresponding StaticInst object.
110 StaticInstPtr
111 decode(ExtMachInst mach_inst, Addr addr)
112 {
113 return defaultCache.decode(this, mach_inst, addr);
114 }
115
116 StaticInstPtr
117 decode(MipsISA::PCState &nextPC)
118 {
119 if (!instDone)
120 return NULL;
121 instDone = false;
122 return decode(emi, nextPC.instAddr());
123 }
58};
59
60} // namespace MipsISA
61
62#endif // __ARCH_MIPS_DECODER_HH__
124};
125
126} // namespace MipsISA
127
128#endif // __ARCH_MIPS_DECODER_HH__