1# -*- mode:python -*- 2 3# Copyright (c) 2004-2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright 9# notice, this list of conditions and the following disclaimer; 10# redistributions in binary form must reproduce the above copyright 11# notice, this list of conditions and the following disclaimer in the 12# documentation and/or other materials provided with the distribution; 13# neither the name of the copyright holders nor the names of its 14# contributors may be used to endorse or promote products derived from 15# this software without specific prior written permission. 16# 17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28# 29# Authors: Gabe Black 30# Steve Reinhardt 31# Korey Sewell 32 33Import('*') 34 35if env['TARGET_ISA'] == 'mips':
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36 Source('bare_iron/system.cc') |
37 Source('dsp.cc') 38 Source('faults.cc')
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39 Source('idle_event.cc') |
40 Source('interrupts.cc') 41 Source('isa.cc')
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42 Source('linux/linux.cc') 43 Source('linux/process.cc') 44 Source('linux/system.cc') |
45 Source('pagetable.cc')
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46 Source('process.cc') |
47 Source('remote_gdb.cc')
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48 Source('stacktrace.cc') 49 Source('system.cc') |
50 Source('tlb.cc') 51 Source('utility.cc') 52 Source('vtophys.cc') 53 54 SimObject('MipsInterrupts.py')
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47 DebugFlag('MipsPRA')
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55 SimObject('MipsSystem.py') |
56 SimObject('MipsTLB.py') 57
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50 if env['FULL_SYSTEM']:
51 SimObject('MipsSystem.py')
52 Source('idle_event.cc')
53 Source('mips_core_specific.cc')
54 Source('system.cc')
55 Source('stacktrace.cc')
56 Source('linux/system.cc')
57 Source('bare_iron/system.cc')
58 else:
59 Source('process.cc')
60 Source('linux/linux.cc')
61 Source('linux/process.cc')
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58 DebugFlag('MipsPRA') |
59 60 # Add in files generated by the ISA description. 61 isa_desc_files = env.ISADesc('isa/main.isa') 62 # Only non-header files need to be compiled. 63 for f in isa_desc_files: 64 if not f.path.endswith('.hh'): 65 Source(f)
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