| isa_parser.py (12597:a2848203dcd0) | isa_parser.py (13496:b2feafd83bce) |
|---|---|
| 1# Copyright (c) 2014, 2016 ARM Limited 2# All rights reserved 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 603 unchanged lines hidden (view full) --- 612 613 if self.is_dest: 614 c_dest = dst_reg_constructor % (self.reg_class, self.reg_spec) 615 c_dest += '\n\t_numFPDestRegs++;' 616 617 return c_src + c_dest 618 619 def makeRead(self, predRead): | 1# Copyright (c) 2014, 2016 ARM Limited 2# All rights reserved 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license --- 603 unchanged lines hidden (view full) --- 612 613 if self.is_dest: 614 c_dest = dst_reg_constructor % (self.reg_class, self.reg_spec) 615 c_dest += '\n\t_numFPDestRegs++;' 616 617 return c_src + c_dest 618 619 def makeRead(self, predRead): |
| 620 bit_select = 0 621 if (self.ctype == 'float' or self.ctype == 'double'): 622 func = 'readFloatRegOperand' 623 else: 624 func = 'readFloatRegOperandBits' | |
| 625 if self.read_code != None: | 620 if self.read_code != None: |
| 626 return self.buildReadCode(func) | 621 return self.buildReadCode('readFloatRegOperandBits') |
| 627 628 if predRead: 629 rindex = '_sourceIndex++' 630 else: 631 rindex = '%d' % self.src_reg_idx 632 | 622 623 if predRead: 624 rindex = '_sourceIndex++' 625 else: 626 rindex = '%d' % self.src_reg_idx 627 |
| 633 return '%s = xc->%s(this, %s);\n' % \ 634 (self.base_name, func, rindex) | 628 code = 'xc->readFloatRegOperandBits(this, %s)' % rindex 629 if self.ctype == 'float': 630 code = 'bitsToFloat32(%s)' % code 631 elif self.ctype == 'double': 632 code = 'bitsToFloat64(%s)' % code 633 return '%s = %s;\n' % (self.base_name, code) |
| 635 636 def makeWrite(self, predWrite): | 634 635 def makeWrite(self, predWrite): |
| 637 if (self.ctype == 'float' or self.ctype == 'double'): 638 func = 'setFloatRegOperand' 639 else: 640 func = 'setFloatRegOperandBits' | |
| 641 if self.write_code != None: | 636 if self.write_code != None: |
| 642 return self.buildWriteCode(func) | 637 return self.buildWriteCode('setFloatRegOperandBits') |
| 643 644 if predWrite: 645 wp = '_destIndex++' 646 else: 647 wp = '%d' % self.dest_reg_idx | 638 639 if predWrite: 640 wp = '_destIndex++' 641 else: 642 wp = '%d' % self.dest_reg_idx |
| 648 wp = 'xc->%s(this, %s, final_val);' % (func, wp) | |
| 649 | 643 |
| 644 val = 'final_val' 645 if self.ctype == 'float': 646 val = 'floatToBits32(%s)' % val 647 elif self.ctype == 'double': 648 val = 'floatToBits64(%s)' % val 649 650 wp = 'xc->setFloatRegOperandBits(this, %s, %s);' % (wp, val) 651 |
|
| 650 wb = ''' 651 { 652 %s final_val = %s; 653 %s\n 654 if (traceData) { traceData->setData(final_val); } 655 }''' % (self.ctype, self.base_name, wp) 656 return wb 657 --- 1962 unchanged lines hidden --- | 652 wb = ''' 653 { 654 %s final_val = %s; 655 %s\n 656 if (traceData) { traceData->setData(final_val); } 657 }''' % (self.ctype, self.base_name, wp) 658 return wb 659 --- 1962 unchanged lines hidden --- |