1# Copyright (c) 2003-2005 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 712 unchanged lines hidden (view full) --- 721 next_pos = match.end() 722 self.sort() 723 # enumerate source & dest register operands... used in building 724 # constructor later 725 self.numSrcRegs = 0 726 self.numDestRegs = 0 727 self.numFPDestRegs = 0 728 self.numIntDestRegs = 0 |
729 self.numMiscDestRegs = 0 |
730 self.memOperand = None 731 for op_desc in self.items: 732 if op_desc.isReg(): 733 if op_desc.is_src: 734 op_desc.src_reg_idx = self.numSrcRegs 735 self.numSrcRegs += 1 736 if op_desc.is_dest: 737 op_desc.dest_reg_idx = self.numDestRegs 738 self.numDestRegs += 1 739 if op_desc.isFloatReg(): 740 self.numFPDestRegs += 1 741 elif op_desc.isIntReg(): 742 self.numIntDestRegs += 1 |
743 elif op_desc.isControlReg(): 744 self.numMiscDestRegs += 1 |
745 elif op_desc.isMem(): 746 if self.memOperand: 747 error("Code block has more than one memory operand.") 748 self.memOperand = op_desc 749 if parser.maxInstSrcRegs < self.numSrcRegs: 750 parser.maxInstSrcRegs = self.numSrcRegs 751 if parser.maxInstDestRegs < self.numDestRegs: 752 parser.maxInstDestRegs = self.numDestRegs |
753 if parser.maxMiscDestRegs < self.numMiscDestRegs: 754 parser.maxMiscDestRegs = self.numMiscDestRegs |
755 # now make a final pass to finalize op_desc fields that may depend 756 # on the register enumeration 757 for op_desc in self.items: 758 op_desc.finalize() 759 760 def __len__(self): 761 return len(self.items) 762 --- 238 unchanged lines hidden (view full) --- 1001 * 1002 * It was automatically generated from the ISA description in %(filename)s 1003 */ 1004 1005namespace %(namespace)s { 1006 1007 const int MaxInstSrcRegs = %(MaxInstSrcRegs)d; 1008 const int MaxInstDestRegs = %(MaxInstDestRegs)d; |
1009 const int MaxMiscDestRegs = %(MaxMiscDestRegs)d; |
1010 1011} // namespace %(namespace)s 1012 1013''' 1014 1015class ISAParser(Grammar): 1016 def __init__(self, output_dir, cpu_models): 1017 super(ISAParser, self).__init__() --- 19 unchanged lines hidden (view full) --- 1037 # file where it was included. 1038 self.fileNameStack = Stack() 1039 1040 symbols = ('makeList', 're', 'string') 1041 self.exportContext = dict([(s, eval(s)) for s in symbols]) 1042 1043 self.maxInstSrcRegs = 0 1044 self.maxInstDestRegs = 0 |
1045 self.maxMiscDestRegs = 0 |
1046 1047 ##################################################################### 1048 # 1049 # Lexer 1050 # 1051 # The PLY lexer module takes two things as input: 1052 # - A list of token names (the string list 'tokens') 1053 # - A regular expression describing a match for each token. The --- 938 unchanged lines hidden (view full) --- 1992 decode_function = '' 1993 self.update_if_needed(cpu.filename, file_template % vars()) 1994 1995 # The variable names here are hacky, but this will creat local 1996 # variables which will be referenced in vars() which have the 1997 # value of the globals. 1998 MaxInstSrcRegs = self.maxInstSrcRegs 1999 MaxInstDestRegs = self.maxInstDestRegs |
2000 MaxMiscDestRegs = self.maxMiscDestRegs |
2001 # max_inst_regs.hh 2002 self.update_if_needed('max_inst_regs.hh', 2003 max_inst_regs_template % vars()) 2004 2005 def parse_isa_desc(self, *args, **kwargs): 2006 try: 2007 self._parse_isa_desc(*args, **kwargs) 2008 except ISAParserError, e: 2009 e.exit(self.fileNameStack) 2010 2011# Called as script: get args from command line. 2012# Args are: <path to cpu_models.py> <isa desc file> <output dir> <cpu models> 2013if __name__ == '__main__': 2014 execfile(sys.argv[1]) # read in CpuModel definitions 2015 cpu_models = [CpuModel.dict[cpu] for cpu in sys.argv[4:]] 2016 ISAParser(sys.argv[3], cpu_models).parse_isa_desc(sys.argv[2]) |