gpu_types.hh (11308:7d8836fd043d) gpu_types.hh (11697:c63431b7bbeb)
1/*
2 * Copyright (c) 2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:

--- 37 unchanged lines hidden (view full) ---

46class BrigObject;
47
48namespace HsailISA
49{
50 // A raw machine instruction represents the raw bits that
51 // our model uses to represent an actual instruction. In
52 // the case of HSAIL this is just an index into a list of
53 // instruction objects.
1/*
2 * Copyright (c) 2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:

--- 37 unchanged lines hidden (view full) ---

46class BrigObject;
47
48namespace HsailISA
49{
50 // A raw machine instruction represents the raw bits that
51 // our model uses to represent an actual instruction. In
52 // the case of HSAIL this is just an index into a list of
53 // instruction objects.
54 typedef uint64_t RawMachInst;
54 typedef uint32_t RawMachInst;
55
56 // The MachInst is a representation of an instruction
57 // that has more information than just the machine code.
58 // For HSAIL the actual machine code is a BrigInstBase
59 // and the BrigObject contains more pertinent
60 // information related to operaands, etc.
61
62 struct MachInst
63 {
64 const Brig::BrigInstBase *brigInstBase;
65 const BrigObject *brigObj;
66 };
67}
68
69#endif // __ARCH_HSAIL_GPU_TYPES_HH__
55
56 // The MachInst is a representation of an instruction
57 // that has more information than just the machine code.
58 // For HSAIL the actual machine code is a BrigInstBase
59 // and the BrigObject contains more pertinent
60 // information related to operaands, etc.
61
62 struct MachInst
63 {
64 const Brig::BrigInstBase *brigInstBase;
65 const BrigObject *brigObj;
66 };
67}
68
69#endif // __ARCH_HSAIL_GPU_TYPES_HH__