gen.py (12563:8d59ed22ae79) gen.py (13450:32a36390a49e)
1#! /usr/bin/python
2
3#
4# Copyright (c) 2015 Advanced Micro Devices, Inc.
5# All rights reserved.
6#
7# For use for simulation and test purposes only
8#

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698
699gen('Ncos', arith_float_types, 'cos(src0)');
700gen('Nsin', arith_float_types, 'sin(src0)');
701
702gen('And', bit_types, 'src0 & src1')
703gen('Or', bit_types, 'src0 | src1')
704gen('Xor', bit_types, 'src0 ^ src1')
705
1#! /usr/bin/python
2
3#
4# Copyright (c) 2015 Advanced Micro Devices, Inc.
5# All rights reserved.
6#
7# For use for simulation and test purposes only
8#

--- 689 unchanged lines hidden (view full) ---

698
699gen('Ncos', arith_float_types, 'cos(src0)');
700gen('Nsin', arith_float_types, 'sin(src0)');
701
702gen('And', bit_types, 'src0 & src1')
703gen('Or', bit_types, 'src0 | src1')
704gen('Xor', bit_types, 'src0 ^ src1')
705
706gen('Bitselect', bit_types, '(src1 & src0) | (src2 & ~src0)')
706gen('Bitselect', bit_types, '(src1 & src0) | (src2 & ~(uint64_t)src0)')
707gen('Popcount', ('U32',), '__builtin_popcount(src0)', 'PopcountInst', \
708 ('sourceType', ('B32', 'B64')))
709
710gen('Shl', arith_int_types, 'src0 << (unsigned)src1', 'ShiftInst')
711gen('Shr', arith_int_types, 'src0 >> (unsigned)src1', 'ShiftInst')
712
713# gen('Mul_hi', types=('s32','u32', '??'))
714# gen('Mul24', types=('s32','u32', '??'))

--- 200 unchanged lines hidden --- 		707gen('Popcount', ('U32',), '__builtin_popcount(src0)', 'PopcountInst', \
708 ('sourceType', ('B32', 'B64')))
709
710gen('Shl', arith_int_types, 'src0 << (unsigned)src1', 'ShiftInst')
711gen('Shr', arith_int_types, 'src0 >> (unsigned)src1', 'ShiftInst')
712
713# gen('Mul_hi', types=('s32','u32', '??'))
714# gen('Mul24', types=('s32','u32', '??'))

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