gen.py (11737:50eceddc2286) gen.py (11738:ad7e8afa0dfe)
1#! /usr/bin/python
2
3#
4# Copyright (c) 2015 Advanced Micro Devices, Inc.
5# All rights reserved.
6#
7# For use for simulation and test purposes only
8#

--- 91 unchanged lines hidden (view full) ---

100exec_code.indent()
101
102###############
103#
104# Define code templates for class declarations (for header file)
105#
106###############
107
1#! /usr/bin/python
2
3#
4# Copyright (c) 2015 Advanced Micro Devices, Inc.
5# All rights reserved.
6#
7# For use for simulation and test purposes only
8#

--- 91 unchanged lines hidden (view full) ---

100exec_code.indent()
101
102###############
103#
104# Define code templates for class declarations (for header file)
105#
106###############
107
108# Basic header template for an instruction stub.
109header_template_stub = '''
110class $class_name : public $base_class
111{
112 public:
113 typedef $base_class Base;
114
115 $class_name(const Brig::BrigInstBase *ib, const BrigObject *obj)
116 : Base(ib, obj, "$opcode")
117 {
118 }
119
120 void execute(GPUDynInstPtr gpuDynInst);
121};
122
123'''
124
108# Basic header template for an instruction with no template parameters.
109header_template_nodt = '''
110class $class_name : public $base_class
111{
112 public:
113 typedef $base_class Base;
114
115 $class_name(const Brig::BrigInstBase *ib, const BrigObject *obj)

--- 96 unchanged lines hidden (view full) ---

212 'CmpInst': header_template_2dt,
213 'CvtInst': header_template_2dt,
214 'PopcountInst': header_template_2dt,
215 'LdInst': '',
216 'StInst': '',
217 'SpecialInstNoSrc': header_template_nodt,
218 'SpecialInst1Src': header_template_nodt,
219 'SpecialInstNoSrcNoDest': '',
125# Basic header template for an instruction with no template parameters.
126header_template_nodt = '''
127class $class_name : public $base_class
128{
129 public:
130 typedef $base_class Base;
131
132 $class_name(const Brig::BrigInstBase *ib, const BrigObject *obj)

--- 96 unchanged lines hidden (view full) ---

229 'CmpInst': header_template_2dt,
230 'CvtInst': header_template_2dt,
231 'PopcountInst': header_template_2dt,
232 'LdInst': '',
233 'StInst': '',
234 'SpecialInstNoSrc': header_template_nodt,
235 'SpecialInst1Src': header_template_nodt,
236 'SpecialInstNoSrcNoDest': '',
237 'Stub': header_template_stub,
220}
221
222###############
223#
224# Define code templates for exec functions
225#
226###############
227
228# exec function body
238}
239
240###############
241#
242# Define code templates for exec functions
243#
244###############
245
246# exec function body
247exec_template_stub = '''
248void
249$class_name::execute(GPUDynInstPtr gpuDynInst)
250{
251 fatal("instruction unimplemented %s\\n", gpuDynInst->disassemble());
252}
253
254'''
229exec_template_nodt_nosrc = '''
230void
231$class_name::execute(GPUDynInstPtr gpuDynInst)
232{
233 Wavefront *w = gpuDynInst->wavefront();
234
235 typedef Base::DestCType DestCType;
236

--- 191 unchanged lines hidden (view full) ---

428 'CmpInst': exec_template_2dt,
429 'CvtInst': exec_template_2dt,
430 'PopcountInst': exec_template_2dt,
431 'LdInst': '',
432 'StInst': '',
433 'SpecialInstNoSrc': exec_template_nodt_nosrc,
434 'SpecialInst1Src': exec_template_nodt_1src,
435 'SpecialInstNoSrcNoDest': '',
255exec_template_nodt_nosrc = '''
256void
257$class_name::execute(GPUDynInstPtr gpuDynInst)
258{
259 Wavefront *w = gpuDynInst->wavefront();
260
261 typedef Base::DestCType DestCType;
262

--- 191 unchanged lines hidden (view full) ---

454 'CmpInst': exec_template_2dt,
455 'CvtInst': exec_template_2dt,
456 'PopcountInst': exec_template_2dt,
457 'LdInst': '',
458 'StInst': '',
459 'SpecialInstNoSrc': exec_template_nodt_nosrc,
460 'SpecialInst1Src': exec_template_nodt_1src,
461 'SpecialInstNoSrcNoDest': '',
462 'Stub': exec_template_stub,
436}
437
438###############
439#
440# Define code templates for the decoder cases
441#
442###############
443

--- 119 unchanged lines hidden (view full) ---

563 expr = re.sub(r'\bsrc(\d)\b', r'src_val\1', expr)
564 expr = re.sub(r'\bdest\b', r'dest_val', expr)
565
566 # Strip template arguments off of base class before looking up
567 # appropriate templates
568 base_class_base = re.sub(r'<.*>$', '', base_class)
569 header_code(header_templates[base_class_base])
570
463}
464
465###############
466#
467# Define code templates for the decoder cases
468#
469###############
470

--- 119 unchanged lines hidden (view full) ---

590 expr = re.sub(r'\bsrc(\d)\b', r'src_val\1', expr)
591 expr = re.sub(r'\bdest\b', r'dest_val', expr)
592
593 # Strip template arguments off of base class before looking up
594 # appropriate templates
595 base_class_base = re.sub(r'<.*>$', '', base_class)
596 header_code(header_templates[base_class_base])
597
571 if base_class.startswith('SpecialInst'):
598 if base_class.startswith('SpecialInst') or base_class.startswith('Stub'):
572 exec_code(exec_templates[base_class_base])
573 elif base_class.startswith('ShiftInst'):
574 header_code(exec_template_shift)
575 else:
576 header_code(exec_templates[base_class_base])
577
578 if not types or isinstance(types, str):
579 # Just a single type

--- 90 unchanged lines hidden (view full) ---

670gen('Ncos', arith_float_types, 'cos(src0)');
671gen('Nsin', arith_float_types, 'sin(src0)');
672
673gen('And', bit_types, 'src0 & src1')
674gen('Or', bit_types, 'src0 | src1')
675gen('Xor', bit_types, 'src0 ^ src1')
676
677gen('Bitselect', bit_types, '(src1 & src0) | (src2 & ~src0)')
599 exec_code(exec_templates[base_class_base])
600 elif base_class.startswith('ShiftInst'):
601 header_code(exec_template_shift)
602 else:
603 header_code(exec_templates[base_class_base])
604
605 if not types or isinstance(types, str):
606 # Just a single type

--- 90 unchanged lines hidden (view full) ---

697gen('Ncos', arith_float_types, 'cos(src0)');
698gen('Nsin', arith_float_types, 'sin(src0)');
699
700gen('And', bit_types, 'src0 & src1')
701gen('Or', bit_types, 'src0 | src1')
702gen('Xor', bit_types, 'src0 ^ src1')
703
704gen('Bitselect', bit_types, '(src1 & src0) | (src2 & ~src0)')
678gen('Firstbit',bit_types, 'firstbit(src0)')
679gen('Popcount', ('U32',), '__builtin_popcount(src0)', 'PopcountInst', \
680 ('sourceType', ('B32', 'B64')))
681
682gen('Shl', arith_int_types, 'src0 << (unsigned)src1', 'ShiftInst')
683gen('Shr', arith_int_types, 'src0 >> (unsigned)src1', 'ShiftInst')
684
685# gen('Mul_hi', types=('s32','u32', '??'))
686# gen('Mul24', types=('s32','u32', '??'))

--- 82 unchanged lines hidden (view full) ---

769
770# Map magic instructions to the BrigSyscall opcode
771# Magic instructions are defined in magic.hh
772#
773# In the future, real HSA kernel system calls can be implemented and coexist
774# with magic instructions.
775gen('Call', base_class='SpecialInstNoSrcNoDest')
776
705gen('Popcount', ('U32',), '__builtin_popcount(src0)', 'PopcountInst', \
706 ('sourceType', ('B32', 'B64')))
707
708gen('Shl', arith_int_types, 'src0 << (unsigned)src1', 'ShiftInst')
709gen('Shr', arith_int_types, 'src0 >> (unsigned)src1', 'ShiftInst')
710
711# gen('Mul_hi', types=('s32','u32', '??'))
712# gen('Mul24', types=('s32','u32', '??'))

--- 82 unchanged lines hidden (view full) ---

795
796# Map magic instructions to the BrigSyscall opcode
797# Magic instructions are defined in magic.hh
798#
799# In the future, real HSA kernel system calls can be implemented and coexist
800# with magic instructions.
801gen('Call', base_class='SpecialInstNoSrcNoDest')
802
803# Stubs for unimplemented instructions:
804# These may need to be implemented at some point in the future, but
805# for now we just match the instructions with their operands.
806#
807# By defining stubs for these instructions, we can work with
808# applications that have them in dead/unused code paths.
809#
810# Needed for rocm-hcc compilations for HSA backends since
811# builtins-hsail library is `cat`d onto the generated kernels.
812# The builtins-hsail library consists of handcoded hsail functions
813# that __might__ be needed by the rocm-hcc compiler in certain binaries.
814gen('Bitmask', base_class='Stub')
815gen('Bitrev', base_class='Stub')
816gen('Firstbit', base_class='Stub')
817gen('Lastbit', base_class='Stub')
818gen('Unpacklo', base_class='Stub')
819gen('Unpackhi', base_class='Stub')
820gen('Pack', base_class='Stub')
821gen('Unpack', base_class='Stub')
822gen('Lerp', base_class='Stub')
823gen('Packcvt', base_class='Stub')
824gen('Unpackcvt', base_class='Stub')
825gen('Sad', base_class='Stub')
826gen('Sadhi', base_class='Stub')
827gen('Activelanecount', base_class='Stub')
828gen('Activelaneid', base_class='Stub')
829gen('Activelanemask', base_class='Stub')
830gen('Activelanepermute', base_class='Stub')
831gen('Groupbaseptr', base_class='Stub')
832gen('Signalnoret', base_class='Stub')
833
777###############
778#
779# Generate file epilogs
780#
781###############
782header_code('''
783template<>
784inline void

--- 71 unchanged lines hidden --- 		834###############
835#
836# Generate file epilogs
837#
838###############
839header_code('''
840template<>
841inline void

--- 71 unchanged lines hidden ---