vec_reg.hh (12334:e0ab29a34764) | vec_reg.hh (13119:398a93017471) |
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1/* | 1/* |
2 * Copyright (c) 2015-2016 ARM Limited | 2 * Copyright (c) 2015-2016, 2018 ARM Limited |
3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 619 unchanged lines hidden (view full) --- 630/** 631 * Calls required for serialization/deserialization 632 */ 633/** @{ */ 634template <size_t Sz> 635inline bool 636to_number(const std::string& value, VecRegContainer<Sz>& v) 637{ | 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 619 unchanged lines hidden (view full) --- 630/** 631 * Calls required for serialization/deserialization 632 */ 633/** @{ */ 634template <size_t Sz> 635inline bool 636to_number(const std::string& value, VecRegContainer<Sz>& v) 637{ |
638 int i = 0; 639 while (i < Sz) { 640 std::string byte = value.substr(i<<1, 2); 641 v.template raw_ptr<uint8_t>()[i] = stoul(byte, 0, 16); 642 i++; | 638 fatal_if(value.size() > 2 * VecRegContainer<Sz>::SIZE, 639 "Vector register value overflow at unserialize"); 640 641 for (int i = 0; i < VecRegContainer<Sz>::SIZE; i++) { 642 uint8_t b = 0; 643 if (2 * i < value.size()) 644 b = stoul(value.substr(i * 2, 2), nullptr, 16); 645 v.template raw_ptr<uint8_t>()[i] = b; |
643 } 644 return true; 645} 646/** @} */ 647 648#endif /* __ARCH_GENERIC_VEC_REG_HH__ */ | 646 } 647 return true; 648} 649/** @} */ 650 651#endif /* __ARCH_GENERIC_VEC_REG_HH__ */ |